ZHCSIK0A July 2018 – October 2021 TPS3430
PRODUCTION DATA
| PARAMETER | DESIGN REQUIREMENT | DESIGN RESULT |
|---|---|---|
| Watchdog Reset delay | Latch WDO upon watchdog fault | Latching watchdog functionality that keeps WDO logic low when fault occurs |
| Watchdog window | Functions with a 1-Hz pulse-width modulation (PWM) signal with a 50% duty cycle | Leaving the CWD pin unconnected with SET0 = 1 and SET1 = 1 produces a window with a tWDL(max) of 920 ms and a tWDU(min) of 1360 ms |
| Output logic voltage | 3.3-V Open-Drain | 3.3-V Open-Drain |
| Maximum device current consumption | 200 μA | 10 μA of current consumption, typical worst-case of 199 μA when WDO is asserted |