ZHCS891G April 2012 – December 2017 TPA3116D2 , TPA3118D2 , TPA3130D2
PRODUCTION DATA.
- 1 特性
- 2 應用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
-
7 Detailed Description
- 7.1 Overview
- 7.2 Functional Block Diagram
- 7.3
Feature Description
- 7.3.1 Gain Setting and Master and Slave
- 7.3.2 Input Impedance
- 7.3.3 Startup and Shutdown Operation
- 7.3.4 PLIMIT Operation
- 7.3.5 GVDD Supply
- 7.3.6 BSPx AND BSNx Capacitors
- 7.3.7 Differential Inputs
- 7.3.8 Device Protection System
- 7.3.9 DC Detect Protection
- 7.3.10 Short-Circuit Protection and Automatic Recovery Feature
- 7.3.11 Thermal Protection
- 7.3.12 Device Modulation Scheme
- 7.3.13 Efficiency: LC Filter Required with the Traditional Class-D Modulation Scheme
- 7.3.14 Ferrite Bead Filter Considerations
- 7.3.15 When to Use an Output Filter for EMI Suppression
- 7.3.16 AM Avoidance EMI Reduction
- 7.4 Device Functional Modes
- 8 Application and Implementation
- 9 Power Supply Recommendations
- 10Layout
- 11器件和文檔支持
- 12機械、封裝和可訂購信息
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
- DAP|32
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- DAP|32
訂購信息
7.4.1 Mono Mode (PBTL)
The TPA31xxD2 family can be connected in MONO mode enabling up to 100W output power. This is done by:
- Connect INPL and INNL directly to Ground (without capacitors) this sets the device in Mono mode during power up.
- Connect OUTPR and OUTNR together for the positive speaker terminal and OUTNL and OUTPL together for the negative pin.
- Analog input signal is applied to INPR and INNR.
Figure 36. Mono Mode