ZHCSJ53A December 2018 – February 2024 TMUX1109
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Pin Configuration and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 Recommended Operating Conditions
- 5.4 Thermal Information
- 5.5 Electrical Characteristics (VDD = 5V ±10 %)
- 5.6 Electrical Characteristics (VDD = 3.3V ±10 %)
- 5.7 Electrical Characteristics (VDD = 2.5V ±10 %), (VSS?= –2.5V ±10 %)
- 5.8 Electrical Characteristics (VDD = 1.8V ±10 %)
- 5.9 Electrical Characteristics (VDD = 1.2V ±10 %)
- Typical Characteristics
- 6 Detailed Description
- 7 Application and Implementation
- 8 Device and Documentation Support
- 9 Revision History
- 10Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- PW|16
- RSV|16
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
- RSV|16
訂購(gòu)信息
6.3.6 Ultra-Low Charge Injection
The TMUX1109 has a transmission gate topology, as shown in Figure 6-13. Any mismatch in the stray capacitance associated with the NMOS and PMOS causes an output level change whenever the switch is opened or closed.
Figure 6-13 Transmission Gate TopologyThe TMUX1109 has special charge-injection cancellation circuitry that reduces the source-to-drain charge injection to as low as 1pC at VS = 1V as shown in Figure 6-14.
Figure 6-14 Charge Injection vs Source Voltage