ZHCSHH2B January 2018 – October 2018 TLV6710
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 修訂歷史記錄
- 5 器件比較表
- 6 Pin Configuration and Functions
- 7 Specifications
- 8 Detailed Description
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12器件和文檔支持
- 13機(jī)械、封裝和可訂購(gòu)信息
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DDC|6
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
7.7 Typical Characteristics
At TJ = 25°C and VDD = 12 V, unless otherwise noted.
Figure 4. INA Positive Input Threshold Voltage (VIT+(INA)) vs Temperature 
| VDD = 1.8 V |
| VDD = 1.8 V |
| Input step ±200 mV |
(High-to-Low Transition at the Inputs)
| VDD = 1.8 V | ||
| VDD = 5 V | ||
| VDD = 5 V, VINA = 410 mV, VINB = 390 mV, VPULLUP = 3.3 V | ||
Figure 5. INA Negative Input Threshold Voltage (VIT–(INA)) vs Temperature 
| VDD = 1.8 V |
| VDD = 1.8 V |
| Input step ±200 mV |
(Low-to-High Transition at the Inputs)
| VDD = 12 V | ||
| VDD = 5 V, VINA = 390 mV, VINB = 410 mV, VPULLUP = 3.3 V | ||
1. Minimum pulse duration required to trigger output high-to-low transition. INA = negative spike below VIT– and INB = positive spike above VIT+.