ZHCSKJ6 December 2019 TL16C750E
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | ||
|---|---|---|---|---|---|---|---|
| VCC = 1.8 V | |||||||
| VOH | High-level output voltage | IOH = –0.5 mA | 1.3 | V | |||
| VOL | Low-level output voltage | IOL = 1 mA | 0.5 | ||||
| II | Input current | VCC = 1.98 V,
VI = 0 to 1.98 V |
VSS = 0,
All other terminals floating |
10 | μA | ||
| IOZ | High-impedance state
output current |
VCC = 1.98 V,
VO = 0 to 1.98 V |
Chip selected in write mode or chip deselect | ±20 | μA | ||
| ICC | Supply current | VCC = 1.98 V, DSR, CTS, and RI at 2 V | All other inputs at 0.4 V,
No load on outputs, XTAL1 at 16 MHz, Baud rate = 1 Mb/s |
6 | mA | ||
| CI(CLK) | Clock input capacitance | VCC = 0,
f = 1 MHz, All other terminals grounded |
VSS = 0,
TA = 25°C, |
5 | 7 | pF | |
| CO(CLK) | Clock output capacitance | 5 | 7 | ||||
| CI | Input capacitance | 6 | 10 | ||||
| CO | Output capacitance | 10 | 15 | ||||
| VCC = 2.5 V | |||||||
| VOH | High-level output voltage | IOH = –1 mA | 1.8 | V | |||
| VOL | Low-level output voltage | IOL = 2 mA | 0.5 | ||||
| II | Input current | VCC = 2.75 V,
VI = 0 to 2.75 V |
VSS = 0,
All other terminals floating |
10 | μA | ||
| IOZ | High-impedance state output current | VCC = 2.75 V,
VO = 0 to 2.75 V |
Chip selected in write mode or chip deselect | ±20 | μA | ||
| ICC | Supply current | VCC = 2.75 V, DCD, CTS, and RI at 2 V | All other inputs at 0.6 V,
No load on outputs, XTAL1 at 24 MHz, Baud rate = 1.5 Mb/s |
13 | mA | ||
| CI(CLK) | Clock input capacitance | VCC = 0,
f = 1 MHz, All other terminals grounded |
VSS = 0,
TA = 25°C, |
5 | 7 | pF | |
| CO(CLK) | Clock output capacitance | 5 | 7 | ||||
| CI | Input capacitance | 6 | 10 | ||||
| CO | Output capacitance | 10 | 15 | ||||
| VCC = 3.3 V | |||||||
| VOH | High-level output voltage | IOH = –1.8 mA | 2.4 | V | |||
| VOL | Low-level output voltage | IOL = 3.2 mA | 0.5 | ||||
| II | Input current | VCC = 3.6 V,
VI = 0 to 3.6 V |
VSS = 0,
All other terminals floating |
10 | μA | ||
| IOZ | High-impedance state
output current |
VCC = 3.6 V,
VO = 0 to 3.6 V |
Chip selected in write mode or chip deselect | ±20 | μA | ||
| ICC | Supply current | VCC = 3.6 V, DSR, CTS, and RI at 2 V | All other inputs at 0.8 V,
No load on outputs, XTAL1 at 32 MHz, Baud rate = 2 Mb/s |
25 | mA | ||
| CI(CLK) | Clock input capacitance | VCC = 0,
f = 1 MHz, All other terminals grounded |
VSS = 0,
TA = 25°C, |
5 | 7 | pF | |
| CO(CLK) | Clock output capacitance | 5 | 7 | ||||
| CI | Input capacitance | 6 | 10 | ||||
| CO | Output capacitance | 10 | 15 | ||||
| VCC = 5 V | |||||||
| VOH | High-level output voltage | IOH = –4 mA | 4 | V | |||
| VOL | Low-level output voltage | IOL = 4 mA | 0.5 | ||||
| II | Input current | VCC = 5.5 V,
VI = 0 to 5.5 V |
VSS = 0,
All other terminals floating |
10 | μA | ||
| IOZ | High-impedance state
output current |
VCC = 5.5 V,
VO = 0 to 5.5 V |
Chip selected in write mode or chip deselect | ±20 | μA | ||
| ICC | Supply current | VCC = 5.5 V, DSR, CTS, and RI at 2 V | All other inputs at 0.8 V,
No load on outputs, XTAL1 at 48 MHz, Baud rate = 3 Mb/s |
60 | mA | ||
| CI(CLK) | Clock input capacitance | VCC = 0,
f = 1 MHz, All other terminals grounded |
VSS = 0,
TA = 25°C, |
5 | 7 | pF | |
| CO(CLK) | Clock output capacitance | 5 | 7 | ||||
| CI | Input capacitance | 6 | 10 | ||||
| CO | Output capacitance | 10 | 15 | ||||