ZHCSF24 May   2016 TDC7201

PRODUCTION DATA.  

1. 1 特性
2. 2 應(yīng)用
3. 3 說明
4. 4 修訂歷史記錄
5. 5 Pin Configuration and Functions
6. 6 Specifications
   1. 6.1 Absolute Maximum Ratings
   2. 6.2 ESD Ratings
   3. 6.3 Recommended Operating Conditions
   4. 6.4 Thermal Information
   5. 6.5 Electrical Characteristics
   6. 6.6 Timing Requirements
   7. 6.7 Switching Characteristics
   8. 6.8 Typical Characteristics
7. 7 Detailed Description
   1. 7.1 Overview
   2. 7.2 Functional Block Diagram
   3. 7.3 Feature Description
      1. 7.3.1 LDO
      2. 7.3.2 CLOCK
      3. 7.3.3 Counters
         1. 7.3.3.1 Coarse and Clock Counters Description
         2. 7.3.3.2 Coarse and Clock Counters Overflow
         3. 7.3.3.3 Clock Counter STOP Mask
         4. 7.3.3.4 ENABLE
   4. 7.4 Device Functional Modes
      1. 7.4.1 Calibration
      2. 7.4.2 Measurement Modes
         1. 7.4.2.1 Measurement Mode 1
            1. 7.4.2.1.1 Calculating Time-of-Flight (Measurement Mode 1)
         2. 7.4.2.2 Measurement Mode 2
            1. 7.4.2.2.1 Calculating Time-of-Flight (TOF) (Measurement Mode 2)
      3. 7.4.3 Timeout
      4. 7.4.4 Multi-Cycle Averaging
      5. 7.4.5 START and STOP Edge Polarity
      6. 7.4.6 Measurement Sequence
      7. 7.4.7 Wait Times for TDC7201 Startup
   5. 7.5 Programming
      1. 7.5.1 Serial Peripheral Interface (SPI)
         1. 7.5.1.1 CSBx
         2. 7.5.1.2 SCLK
         3. 7.5.1.3 DIN
         4. 7.5.1.4 DOUTx
         5. 7.5.1.5 Register Read/Write
         6. 7.5.1.6 Auto Increment Mode
   6. 7.6 Register Maps
      1. 7.6.1  Register Initialization
      2. 7.6.2  TDCx_CONFIG1: TDCx Configuration Register 1 R/W (address = 00h, CSBx asserted) [reset = 0h]
      3. 7.6.3  TDCx_CONFIG2: TDCx Configuration Register 2 R/W (address = 01h, CSBx asserted) [reset = 40h]
      4. 7.6.4  TDCx_INT_STATUS: Interrupt Status Register (address = 02h, CSBx asserted) [reset = 00h]
      5. 7.6.5  TDCx_INT_MASK: TDCx Interrupt Mask Register R/W (address = 03h, CSBx asserted) [reset = 07h]
      6. 7.6.6  TDCx_COARSE_CNTR_OVF_H: Coarse Counter Overflow High Value Register (address = 04h, CSBx asserted) [reset = FFh]
      7. 7.6.7  TDCx_COARSE_CNTR_OVF_L: TDCx Coarse Counter Overflow Low Value Register (address = 05h, CSBx asserted) [reset = FFh ]
      8. 7.6.8  TDCx_CLOCK_CNTR_OVF_H: Clock Counter Overflow High Register (address = 06h, CSBx asserted) [reset = FFh]
      9. 7.6.9  TDCx_CLOCK_CNTR_OVF_L: Clock Counter Overflow Low Register (address = 07h, CSBx asserted) [reset = FFh]
      10. 7.6.10 TDCx_CLOCK_CNTR_STOP_MASK_H: CLOCK Counter STOP Mask High Value Register (address = 08h, CSBx asserted) [reset = 00h]
      11. 7.6.11 TDCx_CLOCK_CNTR_STOP_MASK_L: CLOCK Counter STOP Mask Low Value Register (address = 09h, CSBx asserted) [reset = 00h]
      12. 7.6.12 TDCx_TIME1: Time 1 Register (address: 10h, CSBx asserted) [reset = 00_0000h]
      13. 7.6.13 TDCx_CLOCK_COUNT1: Clock Count Register (address: 11h, CSBx asserted) [reset = 00_0000h]
      14. 7.6.14 TDCx_TIME2: Time 2 Register (address: 12h, CSBx asserted) [reset = 00_0000h]
      15. 7.6.15 TDCx_CLOCK_COUNT2: Clock Count Register (address: 13h, CSBx asserted) [reset = 00_0000h]
      16. 7.6.16 TDCx_TIME3: Time 3 Register (address: 14h, CSBx asserted) [reset = 00_0000h]
      17. 7.6.17 TDCx_CLOCK_COUNT3: Clock Count Registers (address: 15h, CSBx asserted) [reset = 00_0000h]
      18. 7.6.18 TDCx_TIME4: Time 4 Register (address: 16h, CSBx asserted) [reset = 00_0000h]
      19. 7.6.19 TDCx_CLOCK_COUNT4: Clock Count Register (address: 17h, CSBx asserted) [reset = 00_0000h]
      20. 7.6.20 TDCx_TIME5: Time 5 Register (address: 18h, CSBx asserted) [reset = 00_0000h]
      21. 7.6.21 TDCx_CLOCK_COUNT5: Clock Count Register (address: 19h, CSBx asserted) [reset = 00_0000h]
      22. 7.6.22 TDCx_TIME6: Time 6 Register (address: 1Ah, CSBx asserted) [reset = 00_0000h]
      23. 7.6.23 TDCx_CALIBRATION1: Calibration 1 Register (address: 1Bh, CSBx asserted) [reset = 00_0000h]
      24. 7.6.24 TDCx_CALIBRATION2: Calibration 2 Register (address: 1Ch, CSBx asserted) [reset = 00_0000h]
8. 8 Application and Implementation
   1. 8.1 Application Information
   2. 8.2 Typical Application
      1. 8.2.1 Design Requirements
      2. 8.2.2 Detailed Design Procedure
         1. 8.2.2.1 Measuring Time Periods Less Than 12 ns Using TDC7201
      3. 8.2.3 Application Curves
   3. 8.3 CLOCK Recommendations
      1. 8.3.1 CLOCK Accuracy
      2. 8.3.2 CLOCK Jitter
9. 9 Power Supply Recommendations
10. 10Layout
    1. 10.1 Layout Guidelines
    2. 10.2 Layout Example
11. 11器件和文檔支持
    1. 11.1 文檔支持
       1. 11.1.1 Third-Party Products Disclaimer
       2. 11.1.2 相關(guān)文檔　
    2. 11.2 社區(qū)資源
    3. 11.3 商標
    4. 11.4 靜電放電警告
    5. 11.5 Glossary
12. 12機械、封裝和可訂購信息