ZHCSDW4D February 2011 – September 2022 SN74GTL2003
PRODUCTION DATA
| PIN | TYPE(1) | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | NO. | |||
| D1 | 18 | I/O | GTL drain port | |
| D2 | 17 | I/O | GTL drain port | |
| D3 | 16 | I/O | GTL drain port | |
| D4 | 15 | I/O | GTL drain port | |
| D5 | 14 | I/O | GTL drain port | |
| D6 | 13 | I/O | GTL drain port | |
| D7 | 12 | I/O | GTL drain port | |
| D8 | 11 | I/O | GTL drain port | |
| DREF | 19 | — | Drain of reference transistor, tie directly to GREF and pull up to reference voltage through a 200-kΩ resistor | |
| GND | 1 | — | Ground | |
| GREF | 20 | — | Gate of reference transistor, tie directly to DREF and pull up to reference voltage through a 200-kΩ resistor | |
| S1 | 3 | I/O | LVTTL/TTL source port | |
| S2 | 4 | I/O | LVTTL/TTL source port | |
| S3 | 5 | I/O | LVTTL/TTL source port | |
| S4 | 6 | I/O | LVTTL/TTL source port | |
| S5 | 7 | I/O | LVTTL/TTL source port | |
| S6 | 8 | I/O | LVTTL/TTL source port | |
| S7 | 9 | I/O | LVTTL/TTL source port | |
| S8 | 10 | I/O | LVTTL/TTL source port | |
| SREF | 2 | — | Source of reference transistor | |