ZHCSQ26 May 2022 PCM1822
PRODUCTION DATA
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| POWER | ||||||
| AVDD, AREG(1) | Analog supply voltage AVDD to AVSS (AREG is generated using onchip regulator) - AVDD 3.3-V operation | 3.0 | 3.3 | 3.6 | V | |
| IOVDD | IO supply voltage to VSS (thermal pad) - IOVDD 3.3-V operation | 3.0 | 3.3 | 3.6 | V | |
| IO supply voltage to VSS (thermal pad) - IOVDD 1.8-V operation | 1.65 | 1.8 | 1.95 | |||
| INPUTS | ||||||
| Analog input pins and FMT0 voltage to VSS | 0 | AVDD | V | |||
| Digital input pins voltage(except FMT0) to VSS (thermal pad) | 0 | IOVDD | V | |||
| TEMPERATURE | ||||||
| TA | Operating ambient temperature | –40 | 125 | °C | ||
| OTHERS | ||||||
| Digital input pin used as MCLK input clock frequency | 36.864 | MHz | ||||
| CL | Digital output load capacitance | 20 | 50 | pF | ||