SLES254D April 2010 – July 2015 PCM1753-Q1 , PCM1754-Q1
PRODUCTION DATA.
- 1 Features
- 2 Applications
- 3 Description
- 4 Revision History
- 5 Device Comparison Table
- 6 Pin Configuration Functions
- 7 Specifications
-
8 Detailed Description
- 8.1 Overview
- 8.2 Functional Block Diagram
- 8.3 Feature Description
- 8.4 Device Functional Modes
- 8.5 Programming
- 8.6
Register Maps
- 8.6.1
Mode Control Registers (PCM1753-Q1)
- 8.6.1.1 User-Programmable Mode Controls
- 8.6.1.2
Register Definitions
- 8.6.1.2.1 ATx[7:0]: Digital Attenuation Level Setting
- 8.6.1.2.2 MUTx: Soft Mute Control
- 8.6.1.2.3 OVER: Oversampling Rate Control
- 8.6.1.2.4 SRST: Reset
- 8.6.1.2.5 DACx: DAC Operation Control
- 8.6.1.2.6 DM12: Digital De-Emphasis Function Control
- 8.6.1.2.7 DMF[1:0]: Sampling Frequency Selection for the De-Emphasis Function
- 8.6.1.2.8 FMT[2:0]: Audio Interface Data Format
- 8.6.1.2.9 FLT: Digital Filter Rolloff Control
- 8.6.1.2.10 DREV: Output Phase Select
- 8.6.1.2.11 ZREV: Zero Flag Polarity Select
- 8.6.1.2.12 AZRO: Zero Flag Function Select
- 8.6.1
Mode Control Registers (PCM1753-Q1)
- 9 Application and Implementation
- 10Power Supply Recommendations
- 11Layout
- 12Device and Documentation Support
- 13Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- DBQ|16
散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
6 Pin Configuration Functions
PCM1753-Q1 DBQ Package
16-Pin SSOP
Top View
Pin Functions—PCM1753-Q1
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AGND | 9 | — | Analog ground |
| BCK | 1 | I | Audio–data bit–clock input |
| DATA | 2 | I | Audio–data digital input |
| DGND | 4 | I | Digital ground |
| LRCK | 3 | — | L-channel and R-channel audio data latch enable input |
| MC | 14 | I | Mode control clock input(1) |
| MD | 13 | I | Mode control data input(1) |
| ML | 15 | I | Mode control latch input(1) |
| NC | 5 | — | No connection |
| SCK | 16 | I | System clock input |
| VCC | 6 | I | Analog power supply, 5 V |
| VCOM | 10 | — | Common voltage decoupling |
| VOUTL | 7 | — | Analog output for the L-channel |
| VOUTR | 8 | O | Analog output for the R-channel |
| ZEROR/ZEROA | 11 | O | Zero flag output for the R-channel. This pin is also the zero flag output for the L-channel and R-channel(2). |
| ZEROL/NA | 12 | O | Zero flag output fo the L-channel. Not assigned(2) |
(1) Schmitt-trigger input with internal pulldown
(2) Open-drain output.
PCM1754-Q1 DBQ Package
16-Pin SSOP
Top View
Pin Functions—PCM1754-Q1
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AGND | 9 | — | Analog ground |
| BCK | 1 | I | Audio–data bit–clock input |
| DATA | 2 | I | Audio–data digital input |
| DEMP | 13 | I | De–emphasis control(1) |
| DGND | 4 | — | Digital ground |
| FMT | 15 | I | Data format select(1) |
| LRCK | 3 | I | L–channel and R–channel audio data latch enable input |
| MUTE | 14 | I | Analog mixing control(1) |
| NC | 5 | — | No connection |
| SCK | 16 | I | System clock input |
| TEST | 12 | I | Test pin. Ground or open(1) |
| VCC | 6 | — | Analog power supply, 5 V |
| VCOM | 10 | — | Common voltage decoupling |
| VOUTL | 7 | O | Analog output for the L–channel |
| VOUTR | 8 | O | Analog output for the R–channel |
| ZEROA | 11 | O | Zero flag output for the L-channel and R-channel |
(1) Schmitt-trigger input with internal pulldown