ZHCSJ52A December 2019 – August 2021 LP875701-Q1
PRODUCTION DATA
Address: 0x2F
| D7 | D6 | D5 | D4 | D3 | D2 | D1 | D0 |
| Reserved | GPIO3_OUT | GPIO2_OUT | GPIO1_OUT | ||||
| Bits | Field | Type | Default | Description |
|---|---|---|---|---|
| 7:3 | Reserved | R/W | 0h | |
| 2 | GPIO3_OUT | R/W | X | Control for
theGPIO3 signal when configured as the GPIO output 0h = Logic-low level 1h = Logic-high level |
| 1 | GPIO2_OUT | R/W | X | Control for the
GPIO2 signal when configured as the GPIO output 0h = Logic-low level 1h = Logic-high level |
| 0 | GPIO1_OUT | R/W | 0h | Control for
theGPIO1 signal when configured as the GPIO output 0h = Logic-low level 1h = Logic-high level |