ZHCSD73D August 2012 – August 2018 LMZ21700
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PARAMETER | TEST CONDITIONS | MIN(1) | TYP(2) | MAX(1) | UNIT | |
|---|---|---|---|---|---|---|
| SYSTEM PARAMETERS | ||||||
| IQ | Operating quiescent current | EN = high, IOUT= 0 mA, TJ = -40°C to 85°C
device not switching |
17 | 25 | μA | |
| EN = high, IOUT= 0 mA, TJ = -40°C to 125°C
device not switching |
17 | 28 | μA | |||
| ISD | Shutdown current | EN = low, TJ = -40 °C to 85 °C | 1.5 | 4 | μA | |
| EN = low, TJ = -40 °C to 125 °C | 1.5 | 5 | μA | |||
| VINUVLO | Input under voltage lock out rising threshold | 2.8 | 2.9 | 3 | V | |
| VINUVLO-HYS | Input under voltage lock out hysteresis | 0.125 | 0.180 | 0.260 | V | |
| TSD | Thermal shutdown | Rising Threshold | 160 | °C | ||
| TSD-HYST | Thermal shutdown hysteresis | 30 | °C | |||
| CONTROL | ||||||
| VIH, ENABLE | Enable logic HIGH voltage | 0.9 | V | |||
| VIL, ENABLE | Enable logic LOW voltage | 0.3 | V | |||
| ILKG | Input leakage current | EN = VIN or GND | 0.01 | 1 | μA | |
| VTH_PG | Power Good threshold voltage | Rising (% VOUT) | 92 % | 95 % | 98 % | |
| Falling (% VOUT) | 87 % | 90 % | 93 % | |||
| VOL_PG | Power Good output low voltage | IPG = -2 mA | 0.07 | 0.3 | V | |
| ILKG_PG | Power Good leakage current | VPG = 1.8 V | 1 | 400 | nA | |
| ISS | Softstart Pin source current | 2.2 | 2.5 | 2.8 | μA | |
| POWER STAGE | ||||||
| RDS(ON) | High-Side MOSFET ON Resistance | VIN ≥ 6 V | 82 | mΩ | ||
| VIN = 3 V | 120 | |||||
| Low-Side MOSFET ON Resistance | VIN ≥ 6 V | 40 | mΩ | |||
| VIN = 3 V | 50 | |||||
| L | Integrated power inductor value | 2.2 | μH | |||
| DCR | Integrated power inductor DC resistance | 92 | mΩ | |||
| ICL-HS | High-Side MOSFET Current Limit | TA = 25 °C | 1.2 | 1.5 | 1.9 | A |
| ICL-LS | Low-Side MOSFET Current Limit | TA = 25 °C | 0.9 | A | ||
| ICL-DC | Output (DC) current limit | VOUT = 5.0 V, TA = 85 °C | 0.95 | A | ||
| OUTPUT | ||||||
| VREF | Internal reference voltage | 0.7869 | 0.803 | 0.8191 | V | |
| IFB | Feedback pin leakage current | VFB = 0.8V | 1 | 100 | nA | |
| VOUT | Light load initial voltage accuracy | Power save mode, COUT = 22 µF, TA= -40 °C to 85 °C, 1% FB Resistors | -2.3 % | 2.8 % | ||
| VOUT | Load regulation | VOUT = 3.3 V
PWM mode operation |
0.05 % | / A | ||
| VOUT | Line regulation | 3 V ≤ VIN ≤ 17 V, VOUT = 3.3 V, IOUT = 650 mA
PWM mode operation |
0.02 % | / V | ||
| SYSTEM CHARACTERISTICS | ||||||
| η | Full Load Efficiency | VOUT = 3.3 V, IOUT = 650 mA | 88 % | |||
| Light Load Efficiency | VOUT = 3.3 V, IOUT = 1 mA | 72 % | ||||