ZHCSG14D October 2015 – October 2017 LMK61A2-100M , LMK61A2-125M , LMK61A2-156M , LMK61A2-312M , LMK61A2-644M , LMK61E0-050M , LMK61E0-155M , LMK61E0-156M , LMK61E2-100M , LMK61E2-125M , LMK61E2-156M , LMK61E2-312M , LMK61I2-100M
PRODUCTION DATA.
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information
- 6.5 Electrical Characteristics - Power Supply
- 6.6 LVPECL Output Characteristics
- 6.7 LVDS Output Characteristics
- 6.8 HCSL Output Characteristics
- 6.9 OE Input Characteristics
- 6.10 Frequency Tolerance Characteristics
- 6.11 Power-On/Reset Characteristics (VDD)
- 6.12 PSRR Characteristics
- 6.13 PLL Clock Output Jitter Characteristics
- 6.14 Typical 156.25-MHz Output Phase Noise Characteristics
- 6.15 Additional Reliability and Qualification
- 6.16 Typical Characteristics
- 7 Parameter Measurement Information
- 8 Power Supply Recommendations
- 9 Layout
- 10器件和文檔支持
- 11機械、封裝和可訂購信息
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- SIA|6
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
5 Pin Configuration and Functions
SIA Package
6-Pin QFM
Top View
Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| POWER | |||
| GND | 3 | Ground | Device Ground. |
| VDD | 6 | Analog | 3.3 V Power Supply. |
| OUTPUT BLOCK | |||
| OUTP, OUTN | 4, 5 | Universal | Differential Output Pair (LVPECL, LVDS or HCSL). |
| DIGITAL CONTROL / INTERFACES | |||
| NC | 2 | N/A | No Connect. |
| OE | 1 | LVCMOS | Output Enable (internal pullup). When set to low, output pair is disabled and set at high impedance. |