ZHCSK74A August 2019 – April 2020 DRV425-Q1
PRODUCTION DATA.
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| AINN | 14 | I | Inverting input of the shunt-sense amplifier |
| AINP | 13 | I | Noninverting input of the shunt-sense amplifier |
| BSEL | 1 | I | Filter bandwidth select input |
| COMP1 | 16 | I | Internal compensation coil input 1 |
| COMP2 | 17 | I | Internal compensation coil input 2 |
| DRV1 | 12 | O | Compensation coil driver output 1 |
| DRV2 | 11 | O | Compensation coil driver output 2 |
| ERROR | 19 | O | Error flag: open-drain, active-low output |
| GND | 7, 10, 18, 20 | — | Ground reference |
| OR | 15 | O | Shunt-sense amplifier overrange indicator: open-drain, active-low output |
| REFIN | 5 | I | Common-mode reference input for the shunt-sense amplifier |
| REFOUT | 4 | O | Voltage reference output |
| RSEL0 | 3 | I | Voltage reference mode selection input 0 |
| RSEL1 | 2 | I | Voltage reference mode selection input 1 |
| VDD | 8, 9 | — | Supply voltage, 3.0 V to 5.5 V. Decouple both pins using 1-µF ceramic capacitors placed as close as possible to the device. See the Power Supply Decoupling and Layout sections for further details. |
| VOUT | 6 | O | Shunt-sense amplifier output |
| Thermal Pad | Thermal Pad | — | Connect the thermal pad to GND |