ZHCSEJ7B October 2015 – April 2018 DRV2605L-Q1
PRODUCTION DATA.
| MIN | NOM | MAX | UNIT | |||
|---|---|---|---|---|---|---|
| ƒ(SCL) | Frequency at the SCL pin with no wait states | 400 | kHz | |||
| tw(H) | Pulse duration, SCL high | See Figure 1. | 0.6 | µs | ||
| tw(L) | Pulse duration, SCL low | 1.3 | µs | |||
| tsu(1) | Setup time, SDA to SCL | 100 | ns | |||
| th(1) | Hold time, SCL to SDA | 10 | ns | |||
| t(BUF) | Bus free time between stop and start condition | See Figure 2. | 1.3 | µs | ||
| tsu(2) | Setup time, SCL to start condition | 0.6 | µs | |||
| th(2) | Hold time, start condition to SCL | 0.6 | µs | |||
| tsu(3) | Setup time, SCL to stop condition | 0.6 | µs | |||