ZHCSO69D November 1998 – July 2021 CD4027B
PRODUCTION DATA
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 修訂歷史記錄
- 5 Pin Configuration and Functions
- 6 Specifications
- 7 Parameter Measurement Information
- 8 Detailed Description
- 9 Device and Documentation Support
- 10Mechanical, Packaging, and Orderable Information
封裝選項
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
機械數(shù)據(jù) (封裝 | 引腳)
- J|16
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
訂購信息
5 Pin Configuration and Functions
Figure 5-1 Terminal AssignmentTable 5-1 Pin Functions
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| CLOCK1 | 13 | I | Clock input for channel 1 |
| CLOCK2 | 3 | I | Clock input for channel 2 |
| J1 | 10 | I | J input for channel 1 |
| J2 | 6 | I | J input for channel 2 |
| K1 | 11 | I | K input for channel 1 |
| K2 | 5 | I | K input for channel 2 |
| Q1 | 15 | O | Q output for channel 1 |
| Q1 | 14 | O | Inverted Q output for channel 1 |
| Q2 | 1 | O | Q output for channel 2 |
| Q2 | 2 | O | Inverted Q output for channel 2 |
| RESET1 | 12 | I | Reset input for channel 1 |
| RESET2 | 4 | I | Reset input for channel 2 |
| SET1 | 9 | I | Set input for channel 1 |
| SET2 | 7 | I | Set input for channel 2 |
| VDD | 16 | — | Supply |
| VSS | 8 | — | Ground |