亚洲乳大丰满中文字幕,亚州一级毛片在线

ZHCSGY5A October 2017 – December 2017

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

RGT|16
- MPQF119H

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

RGT|16
- QFND098T

訂購(gòu)信息

8.6 Electrical Characteristics

Over junction temperature range (0° ≤ T_J ≤ 125°C) and the recommended supply voltage range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
INPUT
UVLO	Undervoltage lock-out	V_IN: 0 V → 4 V	3.2	3.3	3.4	V
V_hys	Hysteresis on UVLO	V_IN: 4 V → 0 V	200		300	mV
V_IN(DT)	Input power detection threshold	Input power detected when V_IN > V_BAT + V_IN(DT) V_BAT = 3.6 V, VIN: 3.5 V → 4 V	55	80	130	mV
V_hys	Hysteresis on V_IN(DT)	V_BAT = 3.6 V, V_IN: 4 V → 3.5 V	20			mV
t_DGL(PGOOD)	Deglitch time, input power detected status	Time measured from V_IN: 0 V → 5 V 1 μs rise-time to PGOOD = LO		1.2		ms
V_OVP	Input overvoltage protection threshold	V_IN: 5 V → 7 V	6.4	6.6	6.8	V
V_hys	Hysteresis on OVP	V_IN: 7 V → 5V		110		mV
t_DGL(OVP)	Input overvoltage blanking time (OVP fault deglitch)			50		μs
t_REC	Input overvoltage recovery time	Time measured from V_IN: 11 V → 5 V with 1 μs fall-time to PGOOD = LO		1.2		ms
ILIM, ISET SHORT-CIRCUIT DETECTION (CHECKED DURING STARTUP)
I_SC	Current source	V_IN > UVLO and V_IN > V_BAT + V_IN(DT)		1.3		mA
V_SC		V_IN > UVLO and V_IN > V_BAT + V_IN(DT)		520		mV
QUIESCENT CURRENT
I_BAT(PDWN)	Sleep current into BAT pin	CE = LO or HI, input power not detected, No load on OUT pin, T_J = 85°C		4.1	7	μA
I_IN	Standby current into IN pin	EN1= HI, EN2=HI, V_IN = 6 V, T_J < 85°C		39	50	μA
I_IN	Standby current into IN pin	EN1= HI, EN2=HI, V_IN = 10 V, T_J < 85°C		91	200	μA
I_CC	Active supply current, IN pin	CE = LO, V_IN = 6 V, no load on OUT pin, V_BAT > V_BAT(REG), (EN1, EN2) ≠ (HI, HI)			1.5	mA
POWER PATH
V_DO(IN-OUT)	V_IN – V_OUT	V_IN = 4.3 V, I_IN = 1 A, V_BAT = 4.2 V		300	475	mV
V_DO(BAT-OUT)	V_BAT – V_OUT	I_OUT = 1 A, V_IN = 0 V, V_BAT > 3 V		50	100	mV
V_O(REG)	OUT pin voltage regulation	V_IN > V_OUT + V_DO(IN-OUT), V_BAT < 3.2 V	3.31	3.41	3.51	V
V_O(REG)	OUT pin voltage regulation	V_IN > V_OUT + V_DO(IN-OUT), V_BAT ≥ 3.2 V	V_BAT + 145mV	V_BAT + 210mV	V_BAT + 275mV	V
I_INmax	Maximum input current	EN1 = LO, EN2 = LO	90	95	100	mA
		EN1 = HI, EN2 = LO	450	475	500	mA
		EN2 = HI, EN1 = LO		K_ILIM/R_ILIM		A
K_ILIM	Maximum input current factor	I_LIM = 500 mA to 1.5 A	1500	1610	1720	AΩ
K_ILIM	Maximum input current factor	I_LIM = 200 mA to 500 mA	1330	1525	1720	AΩ
I_INmax	Programmable input current limit range	EN2 = HI, EN1 = LO, R_ILIM = 8 kΩ to 1.1 kΩ	200		1500	mA
V_IN-DPM	Input voltage threshold when input current is reduced	EN2 = LO, EN1 = X	4.35	4.5	4.63	V
V_DPPM	Output voltage threshold when charging current is reduced		V_BAT + 125mV	V_BAT + 100mV	V_BAT + 85mV	V
V_BSUP1	Enter battery supplement mode	V_BAT = 3.6 V, R_ILIM = 1.5 kΩ, R_LOAD = 10 Ω → 2 Ω		V_OUT ≤ V_BAT –40mV		V
V_BSUP2	Exit battery supplement mode	V_BAT = 3.6 V, R_ILIM = 1.5 kΩ, R_LOAD = 2 Ω → 10 Ω		V_OUT ≥ V_BAT–20mV		V
V_O(SC1)	Output short-circuit detection threshold, power-on	V_IN > V_UVLO and V_IN > V_BAT + V_IN(DT)	0.8	0.9	1	V
V_O(SC2)	Output short-circuit detection threshold, supplement mode V_BAT – V_OUT > V_O(SC2) indicates short-circuit	V_IN > V_UVLO and V_IN > V_BAT + V_IN(DT)	200	250	300	mV
t_DGL(SC2)	Deglitch time, supplement mode short circuit			250		μs
t_REC(SC2)	Recovery time, supplement mode short circuit			60		ms
BATTERY CHARGER
I_BAT	Source current for BAT pin short-circuit detection	V_BAT = 1.5 V	4	7.5	11	mA
V_BAT(SC)	BAT pin short-circuit detection threshold	V_BAT rising	1.6	1.8	2	V
V_BAT(REG)	Battery charge voltage	('76)	4.358	4.4	4.44	V
V_BAT(REG)	Battery charge voltage	('78)	4.31	4.35	4.39	V
V_LOWV	Pre-charge to fast-charge transition threshold	V_IN > V_UVLO and V_IN > V_BAT + V_IN(DT)	2.9	3	3.1	V
t_DGL1(LOWV)	Deglitch time on pre-charge to fast-charge transition			25		ms
t_DGL2(LOWV)	Deglitch time on fast-charge to pre-charge transition			25		ms
I_CHG	Battery fast charge current range	V_BAT(REG) > V_BAT > V_LOWV, V_IN = 5 V CE = LO, EN1 = LO, EN2 = HI	100		1500	mA
I_CHG	Battery fast charge current	CE = LO, EN1= LO, EN2 = HI, V_BAT > V_LOWV, V_IN = 5 V, I_INmax > I_CHG, no load on OUT pin, thermal loop and DPPM loop not active	K_ISET/R_ISET			A
K_ISET	Fast charge current factor		797	890	975	AΩ
I_PRECHG	Pre-charge current		K_PRECHG/R_ISET			A
K_PRECHG	Pre-charge current factor		60	88	118	AΩ
I_TERM	Termination comparator detection threshold (internally set)	CE = LO, (EN1, EN2) ≠ (LO, LO), V_BAT > V_RCH, t < t_MAXCH, V_IN = 5 V, DPPM loop and thermal loop not active	0.09×I_CHG	0.1×I_CHG	0.11×I_CHG	A
I_TERM	Termination comparator detection threshold (internally set)	CE = LO, (EN1, EN2) = (LO, LO), V_BAT > V_RCH, t < t_MAXCH, V_IN = 5 V, DPPM loop and thermal loop not active	0.027×I_CHG	0.033×I_CHG	0.040×I_CHG	A
I_BIAS(ITERM)	Current for external termination-setting resistor	V_IN > V_UVLO and V_IN > V_BAT + V_IN(DT)	72	75	78	μA
t_DGL(TERM)	Deglitch time, termination detected			25		ms
V_RCH	Recharge detection threshold	V_IN > V_UVLO and V_IN > V_BAT + V_IN(DT)	V_BAT(REG) –140mV	V_BAT(REG) –100mV	V_BAT(REG) –60mV	V
t_DGL(RCH)	Deglitch time, recharge threshold detected			62.5		ms
t_DGL(NO-IN)	Delay time, input power loss to OUT LDO turn-off	V_BAT = 3.6 V. Time measured from V_IN: 5 V → 3 V 1 μs fall-time		20		ms
I_BAT(DET)	Sink current for battery detection	V_BAT = 2.5 V	5	7.5	10	mA
t_DET	Battery detection timer	BAT high or low		250		ms
BATTERY CHARGING TIMERS
t_PRECHG	Pre-charge safety timer value	TMR = floating	1440	1800	2160	s
t_MAXCHG	Charge safety timer value	TMR = floating	14400	18000	21600	s
t_PRECHG	Pre-charge safety timer value	18 kΩ < R_TMR < 72 kΩ	R_TMR × K_TMR			s
t_MAXCHG	Charge safety timer value	18 kΩ < R_TMR < 72 kΩ	10×R_{_TMR ×K_TMR}			s
K_TMR	Timer factor		36	48	60	s/kΩ
BATTERY-PACK NTC MONITOR⁽¹⁾
I_NTC	NTC bias current	V_IN > UVLO and V_IN > V_BAT + V_IN(DT)	72	75	80	μA
V_HOT	High temperature trip point	Battery charging, V_TS Falling	270	300	330	mV
V_HYS(HOT)	Hysteresis on high trip point	Battery charging, V_TS Rising from V_HOT		30		mV
V_COLD	Low temperature trip point	Battery charging, V_TS Rising	2000	2100	2200	mV
V_HYS(COLD)	Hysteresis on low trip point	Battery charging, V_TS Falling from V_COLD		300		mV
t_DGL(TS)	Deglitch time, pack temperature fault detection	TS fault detected to charger disable		50		ms
V_DIS(TS)	TS function disable threshold	TS unconnected		V_IN - 200mV		V
THERMAL REGULATION
T_J(REG)	Temperature regulation limit			125		°C
T_J(OFF)	Thermal shutdown temperature	T_J Rising		155		°C
T_J(OFF-HYS)	Thermal shutdown hysteresis			20		°C
LOGIC LEVELS ON EN1, EN2, CE, SYSOFF, TD
V_IL	Logic LOW input voltage		0		0.4	V
V_IH	Logic HIGH input voltage		1.4		6	V
I_IL	Input sink current	V_IL= 0 V			1	μA
I_IH	Input source current	V_IH= 1.4 V			10	μA
LOGIC LEVELS ON PGOOD, CHG
V_OL	Output LOW voltage	I_SINK = 5 mA			0.4	V

(1) These numbers set trip points of 0°C and 50°C while charging, with 3°C hysteresis on the trip points, with a Vishay Type 2 curve NTC with an R25 of 10 kΩ.