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ZHCSL27B April 2020 – June 2022 AMC1300B-Q1

PRODUCTION DATA

封裝選項

機(jī)械數(shù)據(jù) (封裝 | 引腳)

DWV|8
- MPDS382B

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購信息

6.9 Electrical Characteristics

minimum and maximum specifications apply from T_A = –40°C to +125°C, VDD1 = 3.0 V to 5.5 V, VDD2 = 3.0 V to 5.5 V, INP = –250 mV to +250 mV, and INN = GND1; typical specifications are at T_A = 25°C, VDD1 = 5 V, and VDD2 = 3.3 V (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
ANALOG INPUT
V_CMov	Common-mode overvoltage detection level	(V_INP+ V_INN) / 2 to GND1	VDD1 – 2			V
	Hysteresis of common-mode overvoltage detection level			60		mV
V_OS	Input offset voltage⁽¹⁾	Initial, at T_A = 25°C, INP = INN = GND1	–0.2	±0.01	0.2	mV
TCV_OS	Input offset drift⁽¹⁾⁽⁴⁾		–0.9	±0.1	0.9	μV/°C
CMRR	Common-mode rejection ratio	f_IN = 0 Hz, V_{CM min} ≤ V_CM ≤ V_{CM max}		–100		dB
CMRR	Common-mode rejection ratio	f_IN = 10 kHz, V_{CM min} ≤ V_CM ≤ V_{CM max}		–98		dB
R_IN	Single-ended input resistance	INN = GND1		19		kΩ
R_IND	Differential input resistance			22		kΩ
I_IB	Input bias current	INP = INN = GND1; I_IB = (I_IBP + I_IBN) / 2	–41	–30	–24	μA
I_IO	Input offset current	I_IO = I_IBP – I_IBN; INP = INN = GND1		±5		nA
C_IN	Single-ended input capacitance	INN = GND1, f_IN = 275 kHz		2		pF
C_IND	Differential input capacitance	f_IN = 275 kHz		1		pF
ANALOG OUTPUT
	Nominal gain			8.2		V/V
E_G	Gain error⁽¹⁾	at T_A = 25°C	–0.3%	±0.04%	0.3%
TCE_G	Gain drift⁽¹⁾⁽⁵⁾		–30	±5	30	ppm/°C
	Nonlinearity⁽¹⁾		–0.03%	±0.01%	0.03%
THD	Total harmonic distortion⁽³⁾	f_IN = 10 kHz		–85		dB
	Output noise	INP = INN = GND1, f_IN = 0 Hz, BW = 100 kHz brickwall filter		230		μV_RMS
SNR	Signal-to-noise ratio	f_IN = 1 kHz, BW = 10 kHz	81.5	85		dB
SNR	Signal-to-noise ratio	f_IN = 10 kHz, BW = 100 kHz		72		dB
PSRR	Power-supply rejection ratio⁽²⁾	PSRR vs VDD1, at DC		–103		dB
		PSRR vs VDD1, 100-mV and 10-kHz ripple		–96
		PSRR vs VDD2, at DC		–106
		PSRR vs VDD2, 100-mV and 10-kHz ripple		–86
V_CMout	Common-mode output voltage		1.39	1.44	1.49	V
V_CLIPout	Clipping differential output voltage	V_OUT = (V_OUTP – V_OUTN); \|V_IN\| = \|V_INP – V_INN\| > \|V_Clipping\|	–2.52	±2.49	2.52	V
V_Failsafe	Failsafe differential output voltage	V_CM ≥ V_CMov, or VDD1 missing	–2.63	–2.57	–2.53	V
BW	Output bandwidth		250	310		kHz
R_OUT	Output resistance	On OUTP or OUTN		< 0.2		Ω
	Output short-circuit current	On OUTP or OUTN, sourcing or sinking, INN = INP = GND1, outputs shorted to either GND2 or VDD2		14		mA
CMTI	Common-mode transient immunity	\|GND1 – GND2\| = 1 kV	100	150		kV/μs
POWER SUPPLY
VDD1_UV	VDD1 undervoltage detection threshold voltage	VDD1 falling	2.4	2.6	2.8	V
IDD1	High-side supply current	3.0 V ≤ VDD1 ≤ 3.6 V		6.3	8.5	mA
IDD1	High-side supply current	4.5 V ≤ VDD1 ≤ 5.5 V		7.2	9.8	mA
IDD2	Low-side supply current	3.0 V ≤ VDD2 ≤ 3.6 V		5.3	7.2	mA
IDD2	Low-side supply current	4.5 V ≤ VDD2 ≤ 5.5 V		5.9	8.1	mA

(1) The typical value includes one standard deviation (sigma) at nominal operating conditions.

(2) This parameter is input referred.

(3) THD is the ratio of the rms sum of the amplitues of first five higher harmonics to the amplitude of the fundamental.

(4) Offset error temperature drift is calculated using the box method, as described by the following equation:
TCV_OS = (V_OS,MAX - V_OS,MIN) / TempRange where V_OS,MAX and V_OS,MIN refer to the maximum and minimum V_OS values measured within the temperature range (–40 to 125℃).

(5) Gain error temperature drift is calculated using the box method, as described by the following equation:
TCE_G (ppm) = ((E_G,MAX - E_G,MIN) / TempRange) x 10⁴ where E_G,MAX and E_G,MIN refer to the maximum and minimum E_G values (in %) measured within the temperature range (–40 to 125℃).