Place a differential RC filter (R1, R2, C5) in front of the isolated amplifier to improve signal-to-noise performance of the signal path. Design the input filter such that:

• The cutoff frequency of the filter is at least one order of magnitude lower than the sampling frequency (20MHz) of the ΔΣ modulator
• The input bias current does not generate significant voltage drop across the DC impedance of the input filter
• The impedances measured from the analog inputs are equal

Place capacitors C6 and C7 to improve common-mode rejection at high frequencies (>1MHz) and to improve offset voltage performance. For best performance, verify C6 matches the value of C7 and that both capacitors are 10 to 20 times lower in value than C5. NP0-type capacitors offer low temperature drift and low voltage coefficients, and are preferred for common-mode filtering.

For most applications, the structure shown in Figure 8-2 achieves excellent performance.

Figure 8-2 Differential Input Filter