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TLC6C598-Q1

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汽車(chē)類(lèi)電源邏輯 8 位移位寄存器 LED 驅(qū)動(dòng)器

產(chǎn)品詳情

Number of channels 8 Topology Open drain Rating Automotive Operating temperature range (°C) -40 to 125 Vin (min) (V) 3 Vin (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 40 Iout (max) (A) 0.4 Features Thermal shutdown
Number of channels 8 Topology Open drain Rating Automotive Operating temperature range (°C) -40 to 125 Vin (min) (V) 3 Vin (max) (V) 5.5 Vout (min) (V) 0 Vout (max) (V) 40 Iout (max) (A) 0.4 Features Thermal shutdown
SOIC (D) 16 59.4 mm2 9.9 x 6 TSSOP (PW) 16 32 mm2 5 x 6.4
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Wide Vcc From 3 V to 5.5 V
  • Output Maximum Rating of.40 V
  • Eight Power DMOS Transistor Outputs of 50-mA Continuous Current With VCC = 5 V
  • Thermal Shutdown Protection
  • Enhanced Cascading for Multiple Stages
  • All Registers Cleared With Single Input
  • Low Power Consumption
  • Slow Switching Time (tr and tf), Which Helps Significantly With Reducing EMI
  • 16-Pin TSSOP-PW Package
  • 16-Pin SOIC-D Package
  • Qualified for Automotive Applications
  • AEC-Q100 Qualified With the Following Results:
    • Device Temperature Grade 1: –40°C to 125°C Ambient Operating Temperature Range
    • Device HBM ESD Classification Level H2
    • Device CDM ESD Classification Level C3B
  • Wide Vcc From 3 V to 5.5 V
  • Output Maximum Rating of.40 V
  • Eight Power DMOS Transistor Outputs of 50-mA Continuous Current With VCC = 5 V
  • Thermal Shutdown Protection
  • Enhanced Cascading for Multiple Stages
  • All Registers Cleared With Single Input
  • Low Power Consumption
  • Slow Switching Time (tr and tf), Which Helps Significantly With Reducing EMI
  • 16-Pin TSSOP-PW Package
  • 16-Pin SOIC-D Package

The TLC6C598-Q1 is a monolithic, medium-voltage, low-current power 8-bit shift register designed for use in systems that require relatively moderate load power, such as LEDs.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. A low on CLR clears all registers in the device. Holding the output enable (G) high, holds all data in the output buffers low, and all drain outputs are off. Holding G low makes data from the storage register transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) clocks out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This provides improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. The device contains built-in thermal shutdown protection.

Outputs are low-side, open-drain DMOS transistors with output ratings of 40 V and 50 mA continuous sink-current capabilities when Vcc = 5 V. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2000 V of ESD protection when tested using the human-body model and 200 V when using the machine model.

The TLC6C598-Q1 characterization is for for operation over the operating ambient temperature range of −40°C to 125°C.

The TLC6C598-Q1 is a monolithic, medium-voltage, low-current power 8-bit shift register designed for use in systems that require relatively moderate load power, such as LEDs.

This device contains an 8-bit serial-in, parallel-out shift register that feeds an 8-bit D-type storage register. Data transfers through both the shift and storage registers on the rising edge of the shift-register clock (SRCK) and the register clock (RCK), respectively. The storage register transfers data to the output buffer when shift register clear (CLR) is high. A low on CLR clears all registers in the device. Holding the output enable (G) high, holds all data in the output buffers low, and all drain outputs are off. Holding G low makes data from the storage register transparent to the output buffers. When data in the output buffers is low, the DMOS transistor outputs are off. When data is high, the DMOS transistor outputs have sink-current capability. The serial output (SER OUT) clocks out of the device on the falling edge of SRCK to provide additional hold time for cascaded applications. This provides improved performance for applications where clock signals may be skewed, devices are not located near one another, or the system must tolerate electromagnetic interference. The device contains built-in thermal shutdown protection.

Outputs are low-side, open-drain DMOS transistors with output ratings of 40 V and 50 mA continuous sink-current capabilities when Vcc = 5 V. The current limit decreases as the junction temperature increases for additional device protection. The device also provides up to 2000 V of ESD protection when tested using the human-body model and 200 V when using the machine model.

The TLC6C598-Q1 characterization is for for operation over the operating ambient temperature range of −40°C to 125°C.

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類(lèi)型 標(biāo)題 下載最新的英語(yǔ)版本 日期
* 數(shù)據(jù)表 TLC6C598-Q1 Power Logic 8-Bit Shift Register LED Driver 數(shù)據(jù)表 (Rev. D) PDF | HTML 2016年 9月 13日
應(yīng)用手冊(cè) TLC6C598-Q1, TLC6C5912-Q1 Shift Register LED Driver Application 2015年 6月 4日
用戶指南 TLC6C598-Q1 and TLC6C5912-Q1 Reference Design 2012年 11月 29日

設(shè)計(jì)和開(kāi)發(fā)

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仿真模型

TLC6C598 IBIS Model

SLIM316.ZIP (46 KB) - IBIS Model
仿真模型

TLC6C598 Unencrypted PSpice Transient Model Package (Rev. B)

SLIM311B.ZIP (29 KB) - PSpice Model
模擬工具

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PSpice? for TI 可提供幫助評(píng)估模擬電路功能的設(shè)計(jì)和仿真環(huán)境。此功能齊全的設(shè)計(jì)和仿真套件使用 Cadence? 的模擬分析引擎。PSpice for TI 可免費(fèi)使用,包括業(yè)內(nèi)超大的模型庫(kù)之一,涵蓋我們的模擬和電源產(chǎn)品系列以及精選的模擬行為模型。

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參考設(shè)計(jì)

TIDA-010076 — 通過(guò)單對(duì)以太網(wǎng) (T1) 實(shí)現(xiàn)菊花鏈?zhǔn)诫娫春蛿?shù)據(jù)傳輸?shù)膮⒖荚O(shè)計(jì)

TIDA-010076 展示了如何通過(guò) SPE 傳輸 220W 的電力和 100Mbit/s 的數(shù)據(jù)。與星型拓?fù)渲械某R?guī)系統(tǒng)相比,菊花鏈拓?fù)渲械耐ㄐ畔到y(tǒng)需要的硬件和布線明顯更少。與單對(duì)以太網(wǎng)(SPE,100BASE-T1)及數(shù)據(jù)線供電結(jié)合使用時(shí),該設(shè)計(jì)可以減少接線,實(shí)現(xiàn)簡(jiǎn)化。電力和數(shù)據(jù)僅通過(guò)兩條導(dǎo)線從一個(gè)節(jié)點(diǎn)輸送到另一個(gè)節(jié)點(diǎn)。
設(shè)計(jì)指南: PDF
原理圖: PDF
封裝 引腳 CAD 符號(hào)、封裝和 3D 模型
SOIC (D) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

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  • REACH
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  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測(cè)
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  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

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