產(chǎn)品詳情

Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
Resolution (Bits) 10 Sample rate (max) (ksps) 164 Number of input channels 1 Interface type Parallel Architecture SAR Input type Single-ended Rating Catalog Reference mode External Input voltage range (max) (V) 5.5 Input voltage range (min) (V) 0 Operating temperature range (°C) -40 to 85 Power consumption (typ) (mW) 10 Analog supply voltage (min) (V) 4.75 Analog supply voltage (max) (V) 5.5 Digital supply (min) (V) 4.75 Digital supply (max) (V) 5.5
PLCC (FN) 28 155.0025 mm2 12.45 x 12.45 SOIC (DW) 24 159.65 mm2 15.5 x 10.3
  • Power Dissipation...40 mW Max
  • Advanced LinEPIC? Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and μP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 μs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.
  • Power Dissipation...40 mW Max
  • Advanced LinEPIC? Single-Poly Process Provides Close Capacitor Matching for Better Accuracy
  • Fast Parallel Processing for DSP and μP Interface
  • Either External or Internal Clock Can Be Used
  • Conversion Time...6 μs
  • Total Unadjusted Error...±1 LSB Max
  • CMOS Technology

Advanced LinEPIC is a trademark of Texas Instruments.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.

The TLC1550x and TLC1551 are data acquisition analog-to-digital converters (ADCs) using a 10-bit, switched-capacitor, successive-approximation network. A high-speed, 3-state parallel port directly interfaces to a digital signal processor (DSP) or microprocessor (µP) system data bus. D0 through D9 are the digital output terminals with D0 being the least significant bit (LSB). Separate power terminals for the analog and digital portions minimize noise pickup in the supply leads. Additionally, the digital power is divided into two parts to separate the lower current logic from the higher current bus drivers. An external clock can be applied to CLKIN to override the internal system clock if desired.

The TLC1550I and TLC1551I are characterized for operation from –40°C to 85°C. The TLC1550M is characterized over the full military range of –55°C to 125°C.
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* 數(shù)據(jù)表 10-Bit Analog-to-Digital Converters With Parallel Outputs 數(shù)據(jù)表 (Rev. G) 2003年 10月 30日

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包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

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