THS7303

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具有 I2C 控制、選通濾波、+6db 增益和 2:1 輸入 MUX 的 3 通道低功耗視頻放大器

產(chǎn)品詳情

Number of channels 3 Diff gain (%) 0.13 Iout (typ) (A) 0.07 Vs (min) (V) 2.6 Vs (max) (V) 5.5 Diff phase (°) 0.55 Iq (typ) (mA) 16.6 Number of filter poles 5 Features I2C control method Input configuration 2:1 Operating temperature range (°C) -40 to 85 Rating Catalog
Number of channels 3 Diff gain (%) 0.13 Iout (typ) (A) 0.07 Vs (min) (V) 2.6 Vs (max) (V) 5.5 Diff phase (°) 0.55 Iq (typ) (mA) 16.6 Number of filter poles 5 Features I2C control method Input configuration 2:1 Operating temperature range (°C) -40 to 85 Rating Catalog
TSSOP (PW) 20 41.6 mm2 6.5 x 6.4
  • 3-Video Amplifiers for CVBS, S-Video, Y'U'V', SD/ED/HD Y'P'BP'R, and G'B'R' (R'G'B')
  • I2C? Control of All Functions
  • Integrated Low-Pass Filters
    • 5th-Order Butterworth Characteristics
    • Selectable Corner Frequencies of 9-MHz, 16-MHz, 35-MHz, and Bypass (190-MHz)
  • Selectable Input Bias Modes
    • AC-Coupled with Sync-Tip-Clamp
    • AC-Coupled with Bias
    • DC-Coupled with 135-mV Input Shift
    • DC-Coupled
  • 2:1 Input MUX Allows Multiple Input Sources
  • Built-in 6-dB Gain (2 V/V)
  • SAG Correction Capable
  • 2.7-V to 5-V Single Supply Operation
  • Low 16.6-mA (3.3 V) Total Quiscent Current
  • Individual Disable (< 1 μA) and Mute Control
  • Rail-to-Rail Output:
    • Output Swings within 100 mV from the Rails to Allow AC or DC Output Coupling
    • Supports Driving Two Lines per Channel
  • Low Differential Gain/Phase of 0.13%/0.55°
  • APPLICATIONS
    • Set Top Box Output Video Buffering
    • PVR/DVDR Output Buffering
    • USB/Portable Low Power Video Buffering

    Windows is a registered trademark of Microsoft Corporation.
    I2C is a trademark of NXP Semiconductors.
    All other trademarks are the property of their respective owners.
    • 3-Video Amplifiers for CVBS, S-Video, Y'U'V', SD/ED/HD Y'P'BP'R, and G'B'R' (R'G'B')
    • I2C? Control of All Functions
    • Integrated Low-Pass Filters
      • 5th-Order Butterworth Characteristics
      • Selectable Corner Frequencies of 9-MHz, 16-MHz, 35-MHz, and Bypass (190-MHz)
    • Selectable Input Bias Modes
      • AC-Coupled with Sync-Tip-Clamp
      • AC-Coupled with Bias
      • DC-Coupled with 135-mV Input Shift
      • DC-Coupled
    • 2:1 Input MUX Allows Multiple Input Sources
    • Built-in 6-dB Gain (2 V/V)
    • SAG Correction Capable
    • 2.7-V to 5-V Single Supply Operation
    • Low 16.6-mA (3.3 V) Total Quiscent Current
    • Individual Disable (< 1 μA) and Mute Control
    • Rail-to-Rail Output:
      • Output Swings within 100 mV from the Rails to Allow AC or DC Output Coupling
      • Supports Driving Two Lines per Channel
    • Low Differential Gain/Phase of 0.13%/0.55°
  • APPLICATIONS
    • Set Top Box Output Video Buffering
    • PVR/DVDR Output Buffering
    • USB/Portable Low Power Video Buffering

    Windows is a registered trademark of Microsoft Corporation.
    I2C is a trademark of NXP Semiconductors.
    All other trademarks are the property of their respective owners.

    Fabricated using the new complementary silicon-germanium (SiGe) BiCom-3 process, the THS7303 is a low-power, single-supply, 2.7-V to 5-V, 3-channel integrated video buffer. It incorporates a selectable fifth-order Butterworth filter to eliminate data converter images. The 9-MHz filter is a perfect choice for SDTV video including composite (CVBS), S-Video, and 480i/576i Y'P'BP'R, and G'B'R' (R'G'B') signals. The 16-MHz filter is ideal for EDTV 480p/576p Y'P'BP'R, G'B'R', and VGA signals. The 35-MHz filter is useful for HDTV 720p/1080i Y'P'BP'R, G'B'R', and SVGA/XGA signals. For 1080p or SXGA/UXGA signals, the filter can be bypassed allowing a 190-MHz bandwidth, 300-V/µs amplifier to buffer the signal.

    Each channel of the THS7303 is individually I2C configurable for all functions which makes it flexible for any application. Its rail-to-rail output stage allows for both ac and dc coupling applications. The 6-dB gain along with the built-in SAG correction allows for maximum flexibility as an output video buffer.

    The 16.6-mA total quiescent current (55 mW total power) makes the THS7303 an excellent choice for USB powered or portable video applications. While fully disabled, the THS7303 consumes less than 1 µA making it ideal for energy sensitive applications.

    As part of the THS7303 flexibility, the 2:1 MUX input can be selected for ac- or dc-coupled inputs. The ac-coupled modes include a sync-tip-clamp option for CVBS/Y'/G'/B'/R' with sync or a fixed bias for the C'/P'B/P'R non-sync channels. The dc input options include a dc input or a (dc + 135-mV) input offset shift to allow for a full sync dynamic range at the output with 0-V input.

    Fabricated using the new complementary silicon-germanium (SiGe) BiCom-3 process, the THS7303 is a low-power, single-supply, 2.7-V to 5-V, 3-channel integrated video buffer. It incorporates a selectable fifth-order Butterworth filter to eliminate data converter images. The 9-MHz filter is a perfect choice for SDTV video including composite (CVBS), S-Video, and 480i/576i Y'P'BP'R, and G'B'R' (R'G'B') signals. The 16-MHz filter is ideal for EDTV 480p/576p Y'P'BP'R, G'B'R', and VGA signals. The 35-MHz filter is useful for HDTV 720p/1080i Y'P'BP'R, G'B'R', and SVGA/XGA signals. For 1080p or SXGA/UXGA signals, the filter can be bypassed allowing a 190-MHz bandwidth, 300-V/µs amplifier to buffer the signal.

    Each channel of the THS7303 is individually I2C configurable for all functions which makes it flexible for any application. Its rail-to-rail output stage allows for both ac and dc coupling applications. The 6-dB gain along with the built-in SAG correction allows for maximum flexibility as an output video buffer.

    The 16.6-mA total quiescent current (55 mW total power) makes the THS7303 an excellent choice for USB powered or portable video applications. While fully disabled, the THS7303 consumes less than 1 µA making it ideal for energy sensitive applications.

    As part of the THS7303 flexibility, the 2:1 MUX input can be selected for ac- or dc-coupled inputs. The ac-coupled modes include a sync-tip-clamp option for CVBS/Y'/G'/B'/R' with sync or a fixed bias for the C'/P'B/P'R non-sync channels. The dc input options include a dc input or a (dc + 135-mV) input offset shift to allow for a full sync dynamic range at the output with 0-V input.
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    技術(shù)文檔

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    類型 標(biāo)題 下載最新的英語(yǔ)版本 日期
    * 數(shù)據(jù)表 3-Ch, Low-Power Video Amp w/I2C Control, Select Filters, 6db Gain, 2:1 Input MUX 數(shù)據(jù)表 (Rev. B) 2011年 3月 16日
    應(yīng)用手冊(cè) Noise Analysis for High Speed Op Amps (Rev. A) 2005年 1月 17日

    設(shè)計(jì)和開(kāi)發(fā)

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    用戶指南: PDF
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    驅(qū)動(dòng)程序或庫(kù)

    THS7303SW-LINUX — 用于 THS7303 的 Linux 驅(qū)動(dòng)程序

    Linux 驅(qū)動(dòng)程序支持 THS7303 視頻放大器和濾波器。Linux 驅(qū)動(dòng)程序支持通過(guò) I2C 總線和接口與 V4L2 子系統(tǒng)進(jìn)行通信。
    Linux 主線狀態(tài)

    在 Linux 主線中提供：是
    可通過(guò) git.ti.com 獲取：不適用

    支持的器件：
    • ths7303
    • ths7353
    Linux 源文件

    與該器件關(guān)聯(lián)的文件為：

    1. drivers/media/i2c/ths7303.c
    2. include/media/ths7303.h
    源文件

    drivers/media/i2c/ths7303.c

    其他文件

    include/media/ths7303.h

     

    啟用驅(qū)動(dòng)程序支持

    使用“make (...)
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    仿真模型

    THS7303 IBIS Model

    SLOM435.ZIP (4 KB) - IBIS Model
    下載
    模擬工具

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    用戶指南: PDF
    英語(yǔ)版 (Rev.A): PDF
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    TSSOP (PW) 20 Ultra Librarian

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