主頁 接口 LVDS、M-LVDS 和 PECL IC

SN75LVDS32

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四路高速差分接收器

產(chǎn)品詳情

Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 155 Input signal LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) 0 to 70
Function Receiver Protocols LVDS Number of transmitters 0 Number of receivers 4 Supply voltage (V) 3.3 Signaling rate (Mbps) 155 Input signal LVDS Output signal LVTTL Rating Catalog Operating temperature range (°C) 0 to 70
SOIC (D) 16 59.4 mm2 9.9 x 6
  • Meets or Exceeds the Requirements of ANSI TIA/EIA-644 Standard
  • Operates With a Single 3.3-V Supply
  • Designed for Signaling Rate of up to 155 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Low-Voltage TTL (LVTTL) Logic Output Levels
  • Open-Circuit Fail Safe
  • Characterized For Operation From 0&dg;C to 70°C
  • Meets or Exceeds the Requirements of ANSI TIA/EIA-644 Standard
  • Operates With a Single 3.3-V Supply
  • Designed for Signaling Rate of up to 155 Mbps
  • Differential Input Thresholds ±100 mV Max
  • Low-Voltage TTL (LVTTL) Logic Output Levels
  • Open-Circuit Fail Safe
  • Characterized For Operation From 0&dg;C to 70°C

The SN75LVDS32 and SN75LVDS9637 are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four differential receivers provides a valid logical output state with a ±100 mV allow operation with a differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN75LVDS32 and SN75LVDS9637 are characterized for operation from 0°C to 70°C.

The SN75LVDS32 and SN75LVDS9637 are differential line receivers that implement the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the four differential receivers provides a valid logical output state with a ±100 mV allow operation with a differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.

The intended application of these devices and signaling technique is both point-to-point and multidrop (one driver and multiple receivers) data transmission over controlled impedance media of approximately 100 . The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media and the noise coupling to the environment.

The SN75LVDS32 and SN75LVDS9637 are characterized for operation from 0°C to 70°C.
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類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 High-Speed Differential Line Receivers 數(shù)據(jù)表 (Rev. B) 2001年 6月 22日
應(yīng)用簡報(bào) LVDS to Improve EMC in Motor Drives 2018年 9月 27日
應(yīng)用簡報(bào) How Far, How Fast Can You Operate LVDS Drivers and Receivers? 2018年 8月 3日
應(yīng)用簡報(bào) How to Terminate LVDS Connections with DC and AC Coupling 2018年 5月 16日
應(yīng)用手冊 An Overview of LVDS Technology 1998年 10月 5日

設(shè)計(jì)和開發(fā)

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評估板

SN65LVDS31-32BEVM — 適用于 LVDS31 和 LVDS32B 的 SN65LVDS31-32B 低壓差分信號(hào)評估模塊

TI offers a series of low-voltage differential signaling (LVDS) evaluation modules (EVMs) designed for analysis of the electrical characteristics of LVDS drivers and receivers. Four unique EVMs are available to evaluate the different classes of LVDS devices offered by TI.

Combination Table

As seen (...)

用戶指南: PDF
TI.com 上無現(xiàn)貨
評估板

SN65LVDS31-32EVM — 適用于 SNx5LVDS31 和 SNx5LVDS32 的 SN65LVDS31-32EVM 評估模塊

The SN65LVDS31-32EVM evaluation moduel (EVM) includes the SV65LVDS31 quad driver and the SN65LVDS32 quad receiver. The SN65LVDS31 device is a TIA/EIA-644 standard-compliant LVDS driver. The SN65LVDS32 device is a TIA/EIA-644 standard-compliant receiver that has a passive open-circuit failsafe (...)

用戶指南: PDF
TI.com 上無現(xiàn)貨
仿真模型

SN65LVDS32 IBIS Model (Rev. A)

SLLC011A.ZIP (4 KB) - IBIS Model
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模擬工具

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借助?PSpice for TI 的設(shè)計(jì)和仿真環(huán)境及其內(nèi)置的模型庫，您可對復(fù)雜的混合信號(hào)設(shè)計(jì)進(jìn)行仿真。創(chuàng)建完整的終端設(shè)備設(shè)計(jì)和原型解決方案，然后再進(jìn)行布局和制造，可縮短產(chǎn)品上市時(shí)間并降低開發(fā)成本。?

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模擬工具

TINA-TI — 基于 SPICE 的模擬仿真程序

TINA-TI 提供了 SPICE 所有的傳統(tǒng)直流、瞬態(tài)和頻域分析以及更多。TINA 具有廣泛的后處理功能，允許您按照希望的方式設(shè)置結(jié)果的格式。虛擬儀器允許您選擇輸入波形、探針電路節(jié)點(diǎn)電壓和波形。TINA 的原理圖捕獲非常直觀 - 真正的“快速入門”。

TINA-TI 安裝需要大約 500MB。直接安裝，如果想卸載也很容易。我們相信您肯定會(huì)愛不釋手。

TINA 是德州儀器 (TI) 專有的 DesignSoft 產(chǎn)品。該免費(fèi)版本具有完整的功能，但不支持完整版 TINA 所提供的某些其他功能。

如需獲取可用 TINA-TI 模型的完整列表，請參閱：SpiceRack - 完整列表 

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用戶指南: PDF
英語版 (Rev.A): PDF
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封裝 引腳 CAD 符號(hào)、封裝和 3D 模型
SOIC (D) 16 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識(shí)
  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

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