SN74LV8153

正在供貨

串行轉(zhuǎn)并行接口

產(chǎn)品詳情

Configuration Serial-in, Parallel-out Bits (#) 8 Technology family LV-A Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Input type Schmitt-Trigger Output type Push-Pull Clock frequency (MHz) 0.012 IOL (max) (mA) 40 IOH (max) (mA) -24 Supply current (max) (μA) 20000 Features Over-voltage tolerant inputs, Partial power down (Ioff), Standard speed (tpd > 50ns) Operating temperature range (°C) -40 to 85 Rating Catalog
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family LV-A Supply voltage (min) (V) 3 Supply voltage (max) (V) 5.5 Input type Schmitt-Trigger Output type Push-Pull Clock frequency (MHz) 0.012 IOL (max) (mA) 40 IOH (max) (mA) -24 Supply current (max) (μA) 20000 Features Over-voltage tolerant inputs, Partial power down (Ioff), Standard speed (tpd > 50ns) Operating temperature range (°C) -40 to 85 Rating Catalog
PDIP (N) 20 228.702 mm2 24.33 x 9.4 TSSOP (PW) 20 41.6 mm2 6.5 x 6.4
  • Single-Wire Serial Data Input
  • Compatible With UART Serial-Data Format
  • Up to Eight Devices (64-Bit Parallel) Can Share the Same Bus by Using Different Combinations of A0, A1, A2
  • Up to 40 mA Current Drive in Open-Collector Mode for Driving LEDs
  • Outputs Can be Configured as Open-Collector or Push-Pull
  • Internal Oscillator and Counter for Automatic Data-Rate Detection
  • Output Levels Are Referenced to VCC2 and Can Be Configured From 3 V to 12 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)
  • Single-Wire Serial Data Input
  • Compatible With UART Serial-Data Format
  • Up to Eight Devices (64-Bit Parallel) Can Share the Same Bus by Using Different Combinations of A0, A1, A2
  • Up to 40 mA Current Drive in Open-Collector Mode for Driving LEDs
  • Outputs Can be Configured as Open-Collector or Push-Pull
  • Internal Oscillator and Counter for Automatic Data-Rate Detection
  • Output Levels Are Referenced to VCC2 and Can Be Configured From 3 V to 12 V
  • Latch-Up Performance Exceeds 250 mA Per JESD 17
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 1000-V Charged-Device Model (C101)

The SN74LV8153 is a serial-to-parallel data converter. It accepts serial input data and outputs 8-bit parallel data.

The automatic data-rate detection feature of the SN74LV8153 eliminates the need for an external oscillator and helps with cost and board real-estate savings.

The OUTSEL pin is used to choose between open collector and push-pull outputs. The open-collector option is suitable when this device is used in applications such as LED interface, where high drive current is required. SOUT is the output that acknowledges reception of the serial data.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC1 through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

The SN74LV8153 is a serial-to-parallel data converter. It accepts serial input data and outputs 8-bit parallel data.

The automatic data-rate detection feature of the SN74LV8153 eliminates the need for an external oscillator and helps with cost and board real-estate savings.

The OUTSEL pin is used to choose between open collector and push-pull outputs. The open-collector option is suitable when this device is used in applications such as LED interface, where high drive current is required. SOUT is the output that acknowledges reception of the serial data.

To ensure the high-impedance state during power up or power down, OE\ should be tied to VCC1 through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.
下載 觀看帶字幕的視頻 視頻

技術(shù)文檔

star =有關(guān)此產(chǎn)品的 TI 精選熱門文檔
未找到結(jié)果。請清除搜索并重試。
查看全部 2
類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 SN74LV8153 數(shù)據(jù)表 2003年 12月 17日
應(yīng)用手冊 Power-Up Behavior of Clocked Devices (Rev. B) PDF | HTML 2022年 12月 15日

設(shè)計和開發(fā)

如需其他信息或資源，請點擊以下任一標(biāo)題進(jìn)入詳情頁面查看（如有）。

評估板

14-24-LOGIC-EVM — 采用 14 引腳至 24 引腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產(chǎn)品通用評估模塊

14-24-LOGIC-EVM 評估模塊 (EVM) 設(shè)計用于支持采用 14 引腳至 24 引腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯器件。

用戶指南: PDF | HTML
英語版 (Rev.B): PDF | HTML
TI.com 上無現(xiàn)貨
封裝 引腳 CAD 符號、封裝和 3D 模型
PDIP (N) 20 Ultra Librarian
TSSOP (PW) 20 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

支持和培訓(xùn)

視頻