SN74F574

正在供貨

具有三態(tài)輸出的八通道邊沿觸發(fā)式 D 型觸發(fā)器

產(chǎn)品詳情

Number of channels 8 Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 100 IOL (max) (mA) 24 IOH (max) (mA) -3 Supply current (max) (μA) 86000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 100 IOL (max) (mA) 24 IOH (max) (mA) -3 Supply current (max) (μA) 86000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm2 24.33 x 9.4 SOIC (DW) 20 131.84 mm2 12.8 x 10.3 SOP (NS) 20 98.28 mm2 12.6 x 7.8
  • Eight D-Type Flip-Flops in a Single Package
  • 3-State Bus-Driving True Outputs
  • Full Parallel Access for Loading
  • Buffered Control Inputs
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

 
  • Eight D-Type Flip-Flops in a Single Package
  • 3-State Bus-Driving True Outputs
  • Full Parallel Access for Loading
  • Buffered Control Inputs
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

 

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74F574 is characterized for operation from 0°C to 70°C.

 

 

This 8-bit flip-flop features 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. It is particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The eight flip-flops of the SN74F574 are edge-triggered D-type flip-flops. On the positive transition of the clock (CLK) input, the Q outputs will be set to the logic levels that were set up at the data (D) inputs.

A buffered output enable input can be used to place the eight outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without need for interface or pullup components.

The output enable does not affect the internal operations of the flip-flops. Old data can be retained or new data can be entered while the outputs are in the high-impedance state.

The SN74F574 is characterized for operation from 0°C to 70°C.

 

 
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SN74HCT574 正在供貨 具有三態(tài)輸出的八通道邊沿觸發(fā)式 D 型觸發(fā)器 Voltage range (4.5V to 5.5V), average drive strength (4mA), average propagation delay (22ns)

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類型 標題 下載最新的英語版本 日期
* 數(shù)據(jù)表 Octal Edge-Triggered D-Type Flip-Flop With 3-State Outputs 數(shù)據(jù)表 (Rev. A) 1993年 10月 1日

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包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

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