SN74F377A

正在供貨

具有時鐘使能端的八通道 D 類觸發(fā)器

產品詳情

Number of channels 8 Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 110 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (μA) 90000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family F Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type Push-Pull Clock frequency (max) (MHz) 110 IOL (max) (mA) 20 IOH (max) (mA) -1 Supply current (max) (μA) 90000 Features Very high speed (tpd 5-10ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm2 24.33 x 9.4 SOIC (DW) 20 131.84 mm2 12.8 x 10.3
  • Contains Eight D-Type Flip-Flops With Single-Rail Outputs
  • Clock Enable Latched to Avoid False Clocking
  • Applications Include:
  • Buffer/Storage Registers
  • Shift Registers
  • Pattern Generators
  • Buffered Common Enable Input
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

 
  • Contains Eight D-Type Flip-Flops With Single-Rail Outputs
  • Clock Enable Latched to Avoid False Clocking
  • Applications Include:
  • Buffer/Storage Registers
  • Shift Registers
  • Pattern Generators
  • Buffered Common Enable Input
  • Package Options Include Plastic Small-Outline Packages and Standard Plastic 300-mil DIPs

 

The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if is low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the input.

The SN74F377A is characterized for operation from 0°C to 70°C.

 

 

The SN74F377A is a monolithic, positive-edge-triggered, octal, D-type flip-flop with clock enable inputs. The SN74F377A features a latched clock enable () input.

Information at the data (D) inputs meeting the setup time requirements is transferred to the Q outputs on the positive-going edge of the clock pulse if is low. Clock triggering occurs at a particular voltage level and is not directly related to the positive-going pulse. When the clock input is at either the high or low level, the D input signal has no effect at the output. The circuits are designed to prevent false clocking by transitions at the input.

The SN74F377A is characterized for operation from 0°C to 70°C.

 

 
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SN74HC377 正在供貨 具有時鐘使能端的八路 D 類觸發(fā)器 Voltage range (2V to 6V), average drive strength (8mA), average propagation delay (20ns)

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類型 標題 下載最新的英語版本 日期
* 數據表 Octal D-Type Flip-Flop With Clock Enable 數據表 (Rev. D) 1993年 10月 1日

訂購和質量

包含信息：
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點
  • 封裝廠地點

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