SN74AUC16244

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具有三態(tài)輸出的 16 通道、0.8V 至 2.7V 高速緩沖器

產(chǎn)品詳情

Technology family AUC Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 2.7 Number of channels 16 IOL (max) (mA) 9 Supply current (max) (μA) 20 IOH (max) (mA) -9 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) -40 to 85
Technology family AUC Supply voltage (min) (V) 0.8 Supply voltage (max) (V) 2.7 Number of channels 16 IOL (max) (mA) 9 Supply current (max) (μA) 20 IOH (max) (mA) -9 Input type Standard CMOS Output type 3-State Features Balanced outputs, Over-voltage tolerant inputs, Partial power down (Ioff), Ultra high speed (tpd <5ns) Rating Catalog Operating temperature range (°C) -40 to 85
TSSOP (DGG) 48 101.25 mm2 12.5 x 8.1 TVSOP (DGV) 48 62.08 mm2 9.7 x 6.4
  • Member of the Texas Instruments Widebus Family
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub-1-V Operable
  • Max tpd of 2 ns at 1.8 V
  • Low Power Consumption, 20-μA Max ICC
  • ±8-mA Output Drive at 1.8 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus Is a trademark of Texas Instruments
  • Member of the Texas Instruments Widebus Family
  • Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
  • Ioff Supports Partial-Power-Down Mode Operation
  • Sub-1-V Operable
  • Max tpd of 2 ns at 1.8 V
  • Low Power Consumption, 20-μA Max ICC
  • ±8-mA Output Drive at 1.8 V
  • Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)

Widebus Is a trademark of Texas Instruments

This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC16244 is designed specifically to
improve the performance and density of 3-state
memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

This 16-bit buffer/driver is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.

The SN74AUC16244 is designed specifically to
improve the performance and density of 3-state
memory address drivers, clock drivers, and bus-oriented receivers and transmitters.

The device can be used as four 4-bit buffers, two 8-bit buffers, or one 16-bit buffer. It provides true outputs and symmetrical active-low output-enable (OE) inputs.

To ensure the high-impedance state during power up or power down, OE should be tied to VCC through a pullup resistor; the minimum value of the resistor is determined by the current-sinking capability of the driver.

This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 16-Bit Buffer/Driver With 3-State Outputs 數(shù)據(jù)表 (Rev. E) 2008年 2月 28日
選擇指南 Little Logic Guide 2018 (Rev. G) 2018年 7月 6日
選擇指南 Logic Guide (Rev. AB) 2017年 6月 12日
應(yīng)用手冊 How to Select Little Logic (Rev. A) 2016年 7月 26日
應(yīng)用手冊 Understanding and Interpreting Standard-Logic Data Sheets (Rev. C) 2015年 12月 2日
選擇指南 邏輯器件指南 2014 (Rev. AA) 最新英語版本 (Rev.AC) PDF | HTML 2014年 11月 17日
選擇指南 小尺寸邏輯器件指南 (Rev. E) 最新英語版本 (Rev.G) 2012年 7月 16日
用戶指南 LOGIC Pocket Data Book (Rev. B) 2007年 1月 16日
應(yīng)用手冊 選擇正確的電平轉(zhuǎn)換解決方案 (Rev. A) 英語版 (Rev.A) 2006年 3月 23日
應(yīng)用手冊 Simultaneous-Switching Performance of TI Logic Devices (Rev. B) 2005年 2月 23日
產(chǎn)品概述 Design Summary for WCSP Little Logic (Rev. B) 2004年 11月 4日
應(yīng)用手冊 Semiconductor Packing Material Electrostatic Discharge (ESD) Protection 2004年 7月 8日
用戶指南 Signal Switch Data Book (Rev. A) 2003年 11月 14日
應(yīng)用手冊 Designing With TI Ultra-Low-Voltage CMOS (AUC) Octals and Widebus Devices 2003年 3月 21日
用戶指南 AUC Data Book, January 2003 (Rev. A) 2003年 1月 1日
應(yīng)用手冊 Texas Instruments Little Logic Application Report 2002年 11月 1日
應(yīng)用手冊 TI IBIS File Creation, Validation, and Distribution Processes 2002年 8月 29日
更多文獻(xiàn)資料 Standard Linear & Logic for PCs, Servers & Motherboards 2002年 6月 13日
更多文獻(xiàn)資料 STANDARD LINEAR AND LOGIC FOR DVD/VCD PLAYERS 2002年 3月 27日
更多文獻(xiàn)資料 AUC Product Brochure (Rev. A) 2002年 3月 18日
選擇指南 Logic Guide (Rev. AC) PDF | HTML 1994年 6月 1日

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仿真模型

HSPICE Model for SN74AUC16244

SCEM536.ZIP (113 KB) - HSpice Model
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仿真模型

SN74AUC16244 Behavioral SPICE Model

SCEM733.ZIP (7 KB) - PSpice Model
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仿真模型

SN74AUC16244 IBIS Model

SCEM312.ZIP (72 KB) - IBIS Model
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封裝 引腳 CAD 符號、封裝和 3D 模型
TSSOP (DGG) 48 Ultra Librarian
TVSOP (DGV) 48 Ultra Librarian

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

支持和培訓(xùn)

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