SN74AUC08
- Optimized for 1.8-V Operation and Is 3.6-V I/O Tolerant to Support Mixed-Mode Signal Operation
- Ioff Supports Partial-Power-Down Mode Operation
- Sub-1-V Operable
- Max tpd of 1.9 ns at 1.8 V
- Low Power Consumption, 10-μA Max ICC
- ±8-mA Output Drive at 1.8 V
- Latch-Up Performance Exceeds 100 mA Per JESD 78, Class II
- ESD Protection Exceeds JESD 22
– 2000-V Human-Body Model (A114-A)
– 200-V Machine Model (A115-A)
– 1000-V Charged-Device Model (C101)
This quadruple 2-input positive-AND gate is operational at 0.8-V to 2.7-V VCC, but is designed specifically for 1.65-V to 1.95-V VCC operation.
The SN74AUC08 device performs the Boolean function Y = A B or Y = A B in positive logic.
This device is fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.
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評(píng)估板
14-24-NL-LOGIC-EVM — 采用 14 引腳至 24 引腳無(wú)引線封裝的邏輯產(chǎn)品通用評(píng)估模塊
14-24-EVM 是一款靈活的評(píng)估模塊 (EVM),旨在支持具有 14 引腳至 24 引腳 BQA、BQB、RGY、RSV、RJW 或 RHL 封裝的任何邏輯或轉(zhuǎn)換器件。
| 封裝 | 引腳 | CAD 符號(hào)、封裝和 3D 模型 |
|---|---|---|
| VQFN (RGY) | 14 | Ultra Librarian |
訂購(gòu)和質(zhì)量
包含信息:
- RoHS
- REACH
- 器件標(biāo)識(shí)
- 引腳鍍層/焊球材料
- MSL 等級(jí)/回流焊峰值溫度
- MTBF/時(shí)基故障估算
- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測(cè)
包含信息:
- 制造廠地點(diǎn)
- 封裝廠地點(diǎn)