SN74ALS990

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八路 D 類透明讀回鎖存器

產(chǎn)品詳情

Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) 2.6 Supply current (max) (μA) 70000 Features Flow-through pinout, High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 8 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) 2.6 Supply current (max) (μA) 70000 Features Flow-through pinout, High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
PDIP (N) 20 228.702 mm2 24.33 x 9.4 SOIC (DW) 20 131.84 mm2 12.8 x 10.3
  • 3-State I/O-Type Read-Back Inputs
  • Bus-Structured Pinout
  • True Logic Outputs
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs

 
  • 3-State I/O-Type Read-Back Inputs
  • Bus-Structured Pinout
  • True Logic Outputs
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (N) 300-mil DIPs

 

This 8-bit latch is designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus.

The eight latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs.

Read back is provided through the output-enable () input. When is taken low, the data present at the output of the data latches is allowed to pass back onto the input data bus. When is taken high, the output of the data latches is isolated from the D inputs. does not affect the internal operation of the latches; however, precautions should be taken not to create a bus conflict.

The SN74ALS990 is characterized for operation from 0°C to 70°C.

This 8-bit latch is designed specifically for storing the contents of the input data bus and providing the capability of reading back the stored data onto the input data bus.

The eight latches are transparent D-type latches. While the latch-enable (LE) input is high, the Q outputs follow the data (D) inputs.

Read back is provided through the output-enable () input. When is taken low, the data present at the output of the data latches is allowed to pass back onto the input data bus. When is taken high, the output of the data latches is isolated from the D inputs. does not affect the internal operation of the latches; however, precautions should be taken not to create a bus conflict.

The SN74ALS990 is characterized for operation from 0°C to 70°C.
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SN74ACT573 正在供貨 具有三態(tài)輸出的八路 D 類透明鎖存器 Voltage range (4.5V to 5.5V), average drive strength (24mA), average propagation delay (8ns)

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類型 標(biāo)題 下載最新的英語(yǔ)版本 日期
* 數(shù)據(jù)表 8-Bit D-Type Transparent Read-Back Latch 數(shù)據(jù)表 (Rev. B) 1995年 1月 1日

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包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識(shí)
  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測(cè)
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

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