SN74ALS841

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具有三態(tài)輸出的 10 位總線接口 D 類鎖存器

產(chǎn)品詳情

Number of channels 10 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (μA) 62000 Features Flow-through pinout, High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
Number of channels 10 Technology family ALS Supply voltage (min) (V) 4.5 Supply voltage (max) (V) 5.5 Input type Bipolar Output type 3-State Clock frequency (max) (MHz) 75 IOL (max) (mA) 24 IOH (max) (mA) -2.6 Supply current (max) (μA) 62000 Features Flow-through pinout, High speed (tpd 10-50ns) Operating temperature range (°C) 0 to 70 Rating Catalog
SOIC (DW) 24 159.65 mm2 15.5 x 10.3
  • 3-State Buffer-Type Outputs Drive Bus Lines Directly
  • Bus-Structured Pinout
  • Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
  • Buffered Control Inputs to Reduce dc Loading Effects
  • Power-Up High-Impedance State
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

 
  • 3-State Buffer-Type Outputs Drive Bus Lines Directly
  • Bus-Structured Pinout
  • Provide Extra Bus-Driving Latches Necessary for Wider Address/Data Paths or Buses With Parity
  • Buffered Control Inputs to Reduce dc Loading Effects
  • Power-Up High-Impedance State
  • Package Options Include Plastic Small-Outline (DW) Packages and Standard Plastic (NT) 300-mil DIPs

 

These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs.

A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.

These 10-bit latches feature 3-state outputs designed specifically for driving highly capacitive or relatively low-impedance loads. They are particularly suitable for implementing buffer registers, I/O ports, bidirectional bus drivers, and working registers.

The ten latches are transparent D-type latches. The SN74ALS841 and SN74AS841A have noninverting data (D) inputs. The SN74ALS842 has inverting D\ inputs.

A buffered output-enable () input places the ten outputs in either a normal logic state (high or low logic levels) or a high-impedance state. In the high-impedance state, the outputs neither load nor drive the bus lines significantly. The high-impedance state and increased drive provide the capability to drive bus lines without interface or pullup components.

does not affect the internal operation of the latches. Previously stored data can be retained or new data can be entered while the outputs are off.

The SN74ALS841, SN74AS841A, and SN74ALS842 are characterized for operation from 0°C to 70°C.
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SN74LVC841A 正在供貨 具有三態(tài)輸出的 10 位總線接口 D 類鎖存器 Voltage range (1.65V to 3.6V), average drive strength (24mA), average propagation delay (5.5ns)

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類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 10-Bit Bus-Interface D-Type Latches With 3-State Outputs 數(shù)據(jù)表 (Rev. C) 1995年 1月 1日

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包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識(shí)
  • 引腳鍍層/焊球材料
  • MSL 等級(jí)/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測(cè)
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

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