SN65LVDS048A
- >400 Mbps (200 MHz) Signaling Rates
- Flow-Through Pinout Simplifies PCB Layout
- 50 ps Channel-to-Channel Skew (Typ)
- 200 ps Differential Skew (Typ)
- Propagation Delay Times 2.7 ns (Typ)
- 3.3-V Power Supply Design
- High Impedance LVDS Inputs on Power Down
- Low-Power Dissipation (40 mW at 3.3 V Static)
- Accepts Small Swing (350 mV) Differential Signal Levels
- Supports Open, Short, and Terminated Input Fail-Safe
- Industrial Operating Temperature Range (–40°C to 85°C)
- Conforms to TIA/EIA-644 LVDS Standard
- Available in SOIC and TSSOP Packages
- Pin-Compatible With DS90LV048A From National
The SN65LVDS048A is a quad differential line receiver that implements the electrical characteristics of low-voltage differential signaling (LVDS). This signaling technique lowers the output voltage levels of 5-V differential standard levels (such as EIA/TIA-422B) to reduce the power, increase the switching speeds, and allow operation with a 3.3-V supply rail. Any of the quad differential receivers will provide a valid logical output state with a ±100-mV differential input voltage within the input common-mode voltage range. The input common-mode voltage range allows 1 V of ground potential difference between two LVDS nodes.
The intended application of this device and signaling technique is for point-to-point baseband data transmission over controlled impedance media of approximately 100 
. The transmission media may be printed-circuit board traces, backplanes, or cables. The ultimate rate and distance of data transfer is dependent upon the attenuation characteristics of the media, the noise coupling to the environment, and other system characteristics.
The SN65LVDS048A is characterized for operation from –40°C to 85°C.
技術(shù)文檔
| 類型 | 標(biāo)題 | 下載最新的英語(yǔ)版本 | 日期 | |||
|---|---|---|---|---|---|---|
| * | 數(shù)據(jù)表 | LVDS Quad Differential Line Receiver 數(shù)據(jù)表 (Rev. B) | 2002年 9月 3日 | |||
| 應(yīng)用手冊(cè) | 用于控制和保護(hù)的 HVDC 架構(gòu)和解決方案簡(jiǎn)介 (Rev. B) | PDF | HTML | 英語(yǔ)版 (Rev.B) | PDF | HTML | 2021年 9月 30日 | |
| 應(yīng)用簡(jiǎn)報(bào) | LVDS to Improve EMC in Motor Drives | 2018年 9月 27日 | ||||
| 應(yīng)用簡(jiǎn)報(bào) | How Far, How Fast Can You Operate LVDS Drivers and Receivers? | 2018年 8月 3日 | ||||
| 應(yīng)用簡(jiǎn)報(bào) | How to Terminate LVDS Connections with DC and AC Coupling | 2018年 5月 16日 | ||||
| 應(yīng)用手冊(cè) | An Overview of LVDS Technology | 1998年 10月 5日 |
設(shè)計(jì)和開發(fā)
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| 封裝 | 引腳 | CAD 符號(hào)、封裝和 3D 模型 |
|---|---|---|
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| TSSOP (PW) | 16 | Ultra Librarian |
訂購(gòu)和質(zhì)量
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- REACH
- 器件標(biāo)識(shí)
- 引腳鍍層/焊球材料
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- 材料成分
- 鑒定摘要
- 持續(xù)可靠性監(jiān)測(cè)
- 制造廠地點(diǎn)
- 封裝廠地點(diǎn)
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