SN54LS164

正在供貨

8 位并行輸出串行移位寄存器

產(chǎn)品詳情

Configuration Serial-in, Parallel-out Bits (#) 8 Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Input type Bipolar Output type Push-Pull Clock frequency (MHz) 25 IOL (max) (mA) 8 IOH (max) (mA) -0.4 Supply current (max) (μA) 27000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
Configuration Serial-in, Parallel-out Bits (#) 8 Technology family LS Supply voltage (min) (V) 4.75 Supply voltage (max) (V) 5.25 Input type Bipolar Output type Push-Pull Clock frequency (MHz) 25 IOL (max) (mA) 8 IOH (max) (mA) -0.4 Supply current (max) (μA) 27000 Features High speed (tpd 10-50ns) Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 14 130.4652 mm2 19.56 x 6.67 CFP (W) 14 58.023 mm2 9.21 x 6.3 LCCC (FK) 20 79.0321 mm2 8.89 x 8.89
  • Gated Serial Inputs
  • Fully Buffered Clock and Serial Inputs
  • Asynchronous Clear

 
  • Gated Serial Inputs
  • Fully Buffered Clock and Serial Inputs
  • Asynchronous Clear

 

These 8-bit shift registers feature gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup-time requirements will be entered. Clocking occurs on the low-to-high-level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.

The SN54164 and SN54LS164 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74164 and SN74LS164 are characterized for operation from 0°C to 70°C.

 

These 8-bit shift registers feature gated serial inputs and an asynchronous clear. The gated serial inputs (A and B) permit complete control over incoming data as a low at either input inhibits entry of the new data and resets the first flip-flop to the low level at the next clock pulse. A high-level input enables the other input which will then determine the state of the first flip-flop. Data at the serial inputs may be changed while the clock is high or low, but only information meeting the setup-time requirements will be entered. Clocking occurs on the low-to-high-level transition of the clock input. All inputs are diode-clamped to minimize transmission-line effects.

The SN54164 and SN54LS164 are characterized for operation over the full military temperature range of -55°C to 125°C. The SN74164 and SN74LS164 are characterized for operation from 0°C to 70°C.

 
下載

技術(shù)文檔

star =有關(guān)此產(chǎn)品的 TI 精選熱門文檔
未找到結(jié)果。請清除搜索并重試。
查看全部 1
類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 8-Bit Parallel-Out Serial Shift Registers 數(shù)據(jù)表 1988年 3月 1日

訂購和質(zhì)量

包含信息：
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時(shí)基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息：
  • 制造廠地點(diǎn)
  • 封裝廠地點(diǎn)

支持和培訓(xùn)