CY54FCT373T

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具有三態(tài)輸出的八路透明 D 型鎖存器

產(chǎn)品詳情

Number of channels 8 Technology family FCT Operating temperature range (°C) -55 to 125 Rating Military
Number of channels 8 Technology family FCT Operating temperature range (°C) -55 to 125 Rating Military
CDIP (J) 20 167.464 mm2 24.2 x 6.92 LCCC (FK) 20 79.0321 mm2 8.89 x 8.89
  • Function and Pinout Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 3-State Outputs
  • CY54FCT373T
    • 32-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT373T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current

  • Function and Pinout Compatible With FCT and F Logic
  • Reduced VOH (Typically = 3.3 V) Versions of Equivalent FCT Functions
  • Edge-Rate Control Circuitry for Significantly Improved Noise Characteristics
  • Ioff Supports Partial-Power-Down Mode Operation
  • ESD Protection Exceeds JESD 22
    • 2000-V Human-Body Model (A114-A)
    • 200-V Machine Model (A115-A)
    • 1000-V Charged-Device Model (C101)
  • Matched Rise and Fall Times
  • Fully Compatible With TTL Input and Output Logic Levels
  • 3-State Outputs
  • CY54FCT373T
    • 32-mA Output Sink Current
    • 12-mA Output Source Current
  • CY74FCT373T
    • 64-mA Output Sink Current
    • 32-mA Output Source Current

The \x92FCT373T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

The \x92FCT373T devices consist of eight latches with 3-state outputs for bus-organized applications. When the latch-enable (LE) input is high, the flip-flops appear transparent to the data. Data that meets the required setup times are latched when LE transitions from high to low. Data appears on the bus when the output-enable (OE\) input is low. When OE\ is high, the bus output is in the high-impedance state. In this mode, data can be entered into the latches.

These devices are fully specified for partial-power-down applications using Ioff. The Ioff circuitry disables the outputs, preventing damaging current backflow through the device when it is powered down.

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類型 標題 下載最新的英語版本 日期
* 數(shù)據(jù)表 8-Bit Latches 數(shù)據(jù)表 (Rev. B) 2001年 8月 20日

訂購和質(zhì)量

包含信息:
  • RoHS
  • REACH
  • 器件標識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息:
  • 制造廠地點
  • 封裝廠地點

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