CD14538B

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CMOS 雙路精密單穩(wěn)多諧振蕩器(125 攝氏度工作溫度)

產(chǎn)品詳情

Number of channels 2 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (μA) 3000 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
Number of channels 2 Supply voltage (min) (V) 3 Supply voltage (max) (V) 18 Technology family CD4000 Input type Standard CMOS Output type Push-Pull Supply current (μA) 3000 IOL (max) (mA) 4 IOH (max) (mA) -4 Features Balanced outputs, Positive input clamp diode, Retriggerable, Standard speed (tpd > 50ns) Operating temperature range (°C) -55 to 125 Rating Catalog
PDIP (N) 16 181.42 mm2 19.3 x 9.4 SOIC (D) 16 59.4 mm2 9.9 x 6 SOP (NS) 16 79.56 mm2 10.2 x 7.8 TSSOP (PW) 16 32 mm2 5 x 6.4
  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Replaces CD4538B Type
  • Wide range of output-pulse widths
  • Schmitt-trigger input allows unlimited rise and fall times on +TR and -TR inputs
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Pulse delay and timing
    • Pulse shaping

*T = 0.5 RXCX for CX 1000 pF
#T = RXCX; CXmin = 5000 pF
Data sheet acquired from Harris Semiconductor

  • Retriggerable/resettable capability
  • Trigger and reset propagation delays independent of RX, CX
  • Triggering from leading or trailing edge
  • Q and Q\ buffered outputs available
  • Separate resets
  • Replaces CD4538B Type
  • Wide range of output-pulse widths
  • Schmitt-trigger input allows unlimited rise and fall times on +TR and -TR inputs
  • 100% tested for maximum quiescent current at 20 V
  • Maximum input current of 1 μA at 18 V over full package-temperature range; 100 nA at 18 V and 25°C
  • Noise margin (full package-temperature range):
    • 1 V at VDD = 5 V
    • 2 V at VDD = 10 V
    • 2.5 V at VDD = 15 V
  • 5-V, 10-V, and 15-V parametric ratings
  • Standardized, symmetrical output characteristics
  • Meets all requirements of JEDEC Tentative Standard No. 13B, "Standard Specifications for Description of 'B' Series CMOS Devices"
  • Applications:
    • Pulse delay and timing
    • Pulse shaping

*T = 0.5 RXCX for CX 1000 pF
#T = RXCX; CXmin = 5000 pF
Data sheet acquired from Harris Semiconductor

CD14538B dual precision monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing and accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Precision control of output pulse widths is achieved through linear CMOS techniques.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD14538B is not used, its inputs must be tied to either VDD or VSS. See Table 1.

In normal operation the circuit retriggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time period (T) for this multivibrator can be calculated by: T = RXCX.

The minimum value of external resistance, RX, is 4 K. The minimum and maximum values of external capacitance, CX are 0 pF and 100µF, respectively.

The CD14538B is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B. It can replace the CD4538B which type is not recommended for new designs.

The CD14538B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

CD14538B dual precision monostable multivibrator provides stable retriggerable/resettable one-shot operation for any fixed-voltage timing application.

An external resistor (RX) and an external capacitor (CX) control the timing and accuracy for the circuit. Adjustment of RX and CX provides a wide range of output pulse widths from the Q and Q\ terminals. The time delay from trigger input to output transition (trigger propagation delay) and the time delay from reset input to output transition (reset propagation delay) are independent of RX and CX. Precision control of output pulse widths is achieved through linear CMOS techniques.

Leading-edge-triggering (+TR) and trailing-edge-triggering (-TR) inputs are provided for triggering from either edge of an input pulse. An unused +TR input should be tied to VSS. An unused -TR input should be tied to VDD. A RESET (on low level) is provided for immediate termination of the output pulse or to prevent output pulses when power is turned on. An unused RESET input should be tied to VDD. However, if an entire section of the CD14538B is not used, its inputs must be tied to either VDD or VSS. See Table 1.

In normal operation the circuit retriggers (extends the output pulse one period) on the application of each new trigger pulse. For operation in the non-retriggerable mode, Q\ is connected to -TR when leading-edge triggering (+TR) is used or Q is connected to +TR when trailing-edge triggering (-TR) is used. The time period (T) for this multivibrator can be calculated by: T = RXCX.

The minimum value of external resistance, RX, is 4 K. The minimum and maximum values of external capacitance, CX are 0 pF and 100µF, respectively.

The CD14538B is interchangeable with type MC14538 and is similar to and pin-compatible with the CD4098B* and CD4538B. It can replace the CD4538B which type is not recommended for new designs.

The CD14538B types are supplied in 16-lead hermetic dual-in-line ceramic packages (F3A suffix), 16-lead dual-in-line plastic packages (E suffix), 16-lead small-outline packages (M, M96, MT, and NSR suffixes), and 16-lead thin shrink small-outline packages (PW and PWR suffixes).

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其他器件和數(shù)據(jù)表

該數(shù)據(jù)表適用于 CD14538B 和 CD14538B-MIL

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類型 標(biāo)題 下載最新的英語版本 日期
* 數(shù)據(jù)表 CD14538B TYPES 數(shù)據(jù)表 (Rev. C) 2003年 10月 13日
* SMD CD14538B SMD 5962-90557 2016年 6月 21日
應(yīng)用手冊 使用 SN74LVC1G123 單穩(wěn)多諧振蕩器進(jìn)行設(shè)計 (Rev. A) PDF | HTML 英語版 (Rev.A) PDF | HTML 2021年 7月 20日
應(yīng)用手冊 Wave Solder Exposure of SMT Packages 2008年 9月 9日

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評估板

14-24-LOGIC-EVM — 采用 14 引腳至 24 引腳 D、DB、DGV、DW、DYY、NS 和 PW 封裝的邏輯產(chǎn)品通用評估模塊

14-24-LOGIC-EVM 評估模塊 (EVM) 設(shè)計用于支持采用 14 引腳至 24 引腳 D、DW、DB、NS、PW、DYY 或 DGV 封裝的任何邏輯器件。

用戶指南: PDF | HTML
英語版 (Rev.B): PDF | HTML
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封裝 引腳 CAD 符號、封裝和 3D 模型
PDIP (N) 16 Ultra Librarian
SOIC (D) 16 Ultra Librarian
SOP (NS) 16 Ultra Librarian
TSSOP (PW) 16 Ultra Librarian

訂購和質(zhì)量

包含信息:
  • RoHS
  • REACH
  • 器件標(biāo)識
  • 引腳鍍層/焊球材料
  • MSL 等級/回流焊峰值溫度
  • MTBF/時基故障估算
  • 材料成分
  • 鑒定摘要
  • 持續(xù)可靠性監(jiān)測
包含信息:
  • 制造廠地點
  • 封裝廠地點

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