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SLUSFS4A September 2025 – September 2025 UCC27734-Q1 , UCC27735-Q1

PRODUCTION DATA

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

D|14
- MPDS177H

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

5.5 Electrical Characteristics

At VDD=VHB=15V, COM=VHS=0, all voltages are with respect to COM, no load on LO and HO, –40°C < T_J < +150°C (unless otherwise noted). Currents are positive into and negative out of the specified terminal.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
SUPPLY BLOCK
V_{VDD ON}	Turn-on threshold voltage of VDD	8V UVLO	8.3	9.0	9.7	V
V_{VDD OFF}	Turn-off threshold voltage of VDD	8V UVLO	7.8	8.5	9.2
V_{VDD HYS}	Hysteresis of VDD	8V UVLO		0.6
V_{VHB ON}	Turn-on threshold voltage of VHB-VHS	8V UVLO	7.6	8.3	9.0
V_{VHB OFF}	Turn-off threshold voltage of VHB-VHS	8V UVLO	7.1	7.8	8.5
V_{VHB HYS}	Hysteresis of VHB-VHS	8V UVLO		0.5
I_QDD	Total quiescent VDD to VSS and COM supply current	HI=LI=0 V or 5 V, DC on/off state		150	300	μA
I_QCOM	Quiescent VDD-COM supply current (UCC27735-Q1 only)	HI=LI=0 V or 5 V, DC on/off state		55	100	μA
I_QVSS	Quiescent VDD-VSS supply current (UCC27735-Q1 only)	HI=LI=0 V or 5 V, DC on/off state		110	300	μA
I_QBS	Quiescent HB-HS supply current	HI=0 V or 5 V, HO in DC on/off state		85	180	μA
I_BL	Bootstrap supply leakage current (HB to COM + HB to VSS)	HB=HS=700 V, VDD=COM=0 V		0.1	25	μA
INPUT AND ENABLE BLOCK
V_INH, V_ENH	Input Pin (HI, LI) and enable pin (EN) high threshold		1.7	2.1	2.5	V
V_INL, V_ENL	Input Pin (HI, LI) and enable pin (EN) low threshold		0.7	1.0	1.3	V
V_INHYS,V_ENHYS	Input Pin (HI, LI) and enable pin (EN) threshold hysteresis			1.1		V
I_INL	HI, LI input low bias current	HI, LI = 0 V	-5		5	μA
I_INH	HI, LI input high bias current	HI, LI = 5 V	20		55	μA
I_ENL	EN input low bias current (UCC27735-Q1 only)	EN = 0 V		-75		μA
I_ENH	EN input high bias current (UCC27735-Q1 only)	EN = 5 V		-50		μA
R_HI	Pull down resistor on HI input pin	HI, LI = 5 V	100		200	K?
R_LI	Pull down resistor on LI input pin	HI, LI = 5 V	100		200	K?
R_EN	Pull up resistor on EN pin (UCC27735-Q1 only)	EN = 0 V		200		K?
OUTPUT BLOCK
V_DD-V_LOH	LO output high voltage	LI = 5V, I_LO=-20mA		225	500	mV
V_HB-V_HOH	HO output high voltage	HI = 5V, I_HO=-20mA		225	500	mV
V_LOL	LO output low voltage	LI = 0V, I_LO=20mA		20	40	mV
V_HOL	HO output low voltage	HI = 0V, I_HO=20mA		20	40	mV
R_LOL, R_HOL	LO, HO output pull-down resistance	I_LO=I_HO=20mA		1	2	Ω
R_LOH, R_HOH	LO, HO output pull-up resistance	I_LO=I_HO=-20mA		12.6	25	Ω
I_GPK-⁽¹⁾	HO, LO output sink current	HI=LI=0V, HO=LO=15V, PW<10us		4		A
I_GPK+⁽¹⁾	HO, LO output source current	HI=LI=5V, HO=LO=0V, PW<10us		3.5		A

(1) Ensured by design, not tested in production