ZHCSGE2A April 2017 – February 2018 UCC20225
PRODUCTION DATA.
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY CURRENTS | ||||||
| IVCCI | VCCI quiescent current | DISABLE = VCCI | 1.5 | 2.0 | mA | |
| IVDDA,
IVDDB |
VDDA and VDDB quiescent current | DISABLE = VCCI | 1.0 | 1.8 | mA | |
| IVCCI | VCCI operating current | (f = 500 kHz) current per channel, COUT = 100 pF | 2.5 | mA | ||
| IVDDA,
IVDDB |
VDDA and VDDB operating current | (f = 500 kHz) current per channel, COUT = 100 pF | 2.5 | mA | ||
| VCCI SUPPLY UNDERVOLTAGE LOCKOUT THRESHOLDS | ||||||
| VVCCI_ON | Rising threshold VCCI_ON | 2.55 | 2.7 | 2.85 | V | |
| VVCCI_OFF | Falling threshold VCCI_OFF | 2.35 | 2.5 | 2.65 | V | |
| VVCCI_HYS | Threshold hysteresis | 0.2 | V | |||
| VDD SUPPLY UNDERVOLTAGE LOCKOUT THRESHOLDS | ||||||
| VVDDA_ON,
VVDDB_ON |
Rising threshold VDDA_ON, VDDB_ON | 8.3 | 8.7 | 9.2 | V | |
| VVDDA_OFF,
VVDDB_OFF |
Falling threshold VDDA_OFF, VDDB_OFF | 7.8 | 8.2 | 8.7 | V | |
| VVDDA_HYS,
VVDDB_HYS |
Threshold hysteresis | 0.5 | V | |||
| PWM AND DISABLE | ||||||
| VPWMH, VDISH | Input high voltage | 1.6 | 1.8 | 2 | V | |
| VPWML, VDISL | Input low voltage | 0.8 | 1 | 1.2 | V | |
| VPWM_HYS, VDIS_HYS | Input hysteresis | 0.8 | V | |||
| VPWM | Negative transient, ref to GND, 50 ns pulse | Not production tested, bench test only | –5 | V | ||
| OUTPUT | ||||||
| IOA+, IOB+ | Peak output source current | CVDD = 10 µF, CLOAD = 0.18 µF, f = 1 kHz, bench measurement | 4 | A | ||
| IOA-, IOB- | Peak output sink current | CVDD = 10 µF, CLOAD = 0.18 µF, f = 1 kHz, bench measurement | 6 | A | ||
| ROHA, ROHB | Output resistance at high state | IOUT = –10 mA, TA = 25°C, ROHA, ROHBdo not represent drive pull-up performance. See tRISE in Switching Characteristics and Output Stage for details. | 5 | Ω | ||
| ROLA, ROLB | Output resistance at low state | IOUT = 10 mA, TA = 25°C | 0.55 | Ω | ||
| VOHA, VOHB | Output voltage at high state | VVDDA, VVDDB = 12 V, IOUT = –10 mA, TA = 25°C | 11.95 | V | ||
| VOLA, VOLB | Output voltage at low state | VVDDA, VVDDB = 12 V, IOUT = 10 mA, TA = 25°C | 5.5 | mV | ||
| DEADTIME AND OVERLAP PROGRAMMING | ||||||
| Dead time | Pull DT pin to VCCI | 0 | ns | |||
| DT pin is left open, min spec characterized only, tested for outliers | 8 | 15 | ns | |||
| RDT = 20 kΩ | 160 | 200 | 240 | ns | ||