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ZHCSGQ4 September 2017 TUSB213-Q1

PRODUCTION DATA.

封裝選項(xiàng)

請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。

機(jī)械數(shù)據(jù) (封裝 | 引腳)

RGY|14

散熱焊盤(pán)機(jī)械數(shù)據(jù) (封裝 | 引腳)

訂購(gòu)信息

6 Specifications

6.1 Absolute Maximum Ratings

over operating free-air temperature and voltage range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Supply Voltage Range	VCC	-0.3	6	V
Voltage Range on I/O pins	DxP, DxM, RSTN, EQ, SCL, SDA, DC_BOOST, VREG	-0.3	3.8	V
T_stg	Storage temperature	-65	150	°C

(1) Stresses beyond those listed under Absolute Maximum Rating may cause permanent damage to the device. These are stress ratings only, which do not imply functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Condition. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

			VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human body model (HBM), per ANSI/ESDA/JEDEC JS-001, all pins⁽¹⁾	±2000	V
V_(ESD)	Electrostatic discharge	Charged device model (CDM), per JEDEC specification JESD22-C101, all pins⁽²⁾	±500	V

(1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process.

(2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process.

6.3 Recommended Operating Conditions

over operating free-air temperature and voltage range (unless otherwise noted)

			MIN	NOM	MAX	UNIT
V_CC	Supply voltage		4.4	5	5.5	V
T_A	Ambient temperature	TUSB213Q1	-40		105	°C
T_J	Junction temperature	TUSB213Q1	-40		125	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾			UNIT
		RGY (VQFN)
		14 PINS
R_θJA	Junction-to-ambient thermal resistance	49.1	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	52.8	°C/W
R_θJB	Junction-to-board thermal resistance	24.2	°C/W
Ψ_JT	Junction-to-top characterization parameter	2.2	°C/W
Ψ_JB	Junction-to-board characterization parameter	24.3	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	7	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
POWER
I_{ACTIVE_HS}	High-speed active curent	USB channel = HS mode; 480 Mbps traffic; V_CC = 5V; V_CC supply stable; DC Boost = 60 mV		18	30	mA
I_{IDLE_HS}	High-speed idle current	USB channel = HS mode; no traffic; V_CC = 5V; V_CC supply stable; DC Boost = 60 mV		13	22	mA
I_{SUSPEND_HS}	High-speed suspend current	USB channel = HS suspend mode; V_CC = 5V; V_CC supply stable		0.76	1.5	mA
I_{FS_LS}	Full/Low speed current	USB channel = FS mode or LS mode; V_CC = 5V		0.77	1.5	mA
I_DISCONNECT	Disconnect current	Host side application; No device attachment; V_CC = 5V		0.86	1.5	mA
I_RSTN	Disable current	RSTN driven low; V_CC supply stable; V_CC = 5V		22	80	µA
I_{LKG_FS}	Pin fail-safe leakage current for SDA, SCL, DC_BOOST, DxP/N, RSTN	V_CC = 0 V; Pin at 3.6 V			40	µA
RSTN
V_IH	High-level input voltage	V_CC = 4.4V	2		3.6	V
V_IL	Low-level input voltage	V_CC = 5.5V	0		0.8	V
I_IH	High-level input current	V_IH = 3.6 V	-4		4	µA
I_IL	Low-level input current	V_IL = 0 V	-11		11	µA
EQ
R_EQ	External pull-down resistor on EQ pin.	AC Boost Level 0			160	Ω
		AC Boost Level 1	1.4		2	kΩ
		AC Boost Level 2	3.7		3.9	kΩ
		AC Boost Level 3	6			kΩ
CD, ENA_HS
V_OH	High-level output voltage	I_O = -50µA	2.4			V
V_OL	Low-level output voltage	I_O = 50µA			0.4	V
SCL, SDA
C_I2CBUS	I2C Bus capacitance		4		150	pF
V_IH	SDA and SCL input high level voltage	V_CC = 4.4V	2		3.6	V
V_IL	SDA and SCL input Low level voltage	V_CC = 5.5V			0.8	V
V_{SDA_OL}	SDA low-level output voltage	4.7kΩ pullup to 3.6V; V_CC = 4.4V			0.4	V
I_{SDA_OL}	SDA Low level output current	V_CC = 5.5V; I²C pulled up to 3.6V	1.1			mA
DC_BOOST
V_IH	High-level input voltage	V_CC = 5V	2.4		3.6	V
V_IM	Mid-level input voltage	V_CC = 5V		1.6		V
V_IL	Low-level input voltage	V_CC = 5V	0		0.4	V
DxP, DxM
C_{IO_DXX}	Capacitance to GND	Measured with LCR meter and device powered down. 1 MHz sinusoid, 30 mVpp ripple		2.7		pF

6.6 Switching Characteristics

over operating free-air temperature and voltage range (unless otherwise noted)

PARAMETER		TEST CONDITIONS	MIN	MAX	UNIT
F_{BR_DXX}	DxP/M Bit Rate	USB channel = HS mode; 480 Mbps traffic; VCC supply stable		480.24	Mbps
t_{RISE_DXX}	DxP/M rise time	10% - 90%; V_CC = 5.5V; Max AC Gain;	100		ps
t_{FALL_DXX}	DxP/M fall time	90% - 10%; V_CC = 5.5V; Max AC Gain;	100		ps
t_{RSTN_PULSE_WIDTH}	Minimum width to detect a valid RSTN signal assert when the pin is actively driven	V_CC = 4.4 V; Refer to Figure 1	20		µs
t_STABLE	VCC stable before RSTN de-assertion	Refer to Figure 1	100		µs
t_{VCC_RAMP}	VCC ramp time		0.2	100	ms

Figure 1. Power On and Reset Timing

6.7 Typical Characteristics

Figure 2. USB2.0 HS Eye diagram, Host far-end with 2m cable post-channel loss without TUSB213-Q1

Figure 4. USB2.0 HS Eye diagram, Host far-end with 5m cable pre-channel loss without TUSB213-Q1

Figure 3. USB2.0 HS Eye diagram, Host far-end with 2m cable post-channel loss with TUSB213-Q1

TUSB213-Q1 tc_tusb213_eye_5m_sllsex6.png

Figure 5. USB2.0 HS Eye diagram, Host far-end with 5m cable pre-channel loss with TUSB213-Q1