SLUSCZ1 May 2017 TPS92518-Q1
PRODUCTION DATA.
Each of the analog outputs are controlled via their own individual DAC. The DAC's operate asynchronously and changes to controlling register values are updated immediately (~1 µs).
The ADC (analog to digital converter) sampling intervals are asynchronous to the incoming PWM1 and PWM2 signals. The TPS92518-Q1 logic determines which register(s) to update based on the state of the corresponding PWM signal at the time of ADC sampling. There are three LED voltage registers per channel:
The LEDx_LAST_ON registers are only updated when the corresponding PWM input has toggled from high to low, and the LEDx_LAST_OFF registers are only updated when the corresponding PWM input has toggled from low to high. This allows the last sample before the falling edge of PWM to be saved as the LAST_ON value, and the last sample before the rising edge of PWM to be saved as the LAST_OFF value ensuring the most consistent LED voltage reading.