ZHCSPL6 January 2022 TPS7H4003-SEP
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY VOLTAGE (VIN AND PVIN PINS) | ||||||
| PVIN operating input voltage | 3.0 | 7.0 | V | |||
| PVIN internal UVLO threshold | PVIN rising | 2.425 | 2.50 | 2.575 | V | |
| PVIN internal UVLO hysteresis | Load = 0 A | 425 | 450 | 475 | mV | |
| VIN operating input voltage | 3.0 | 7.0 | V | |||
| VIN internal UVLO threshold | VIN rising | 2.71 | 2.75 | 2.80 | V | |
| VIN internal UVLO hysteresis | 134 | 150 | 178 | mV | ||
| VIN shutdown supply current | VEN = 0 V | 2.32 | 2.85 | mA | ||
| VIN operating – non switching supply current | VSENSE = VBG | 4 | 6 | mA | ||
| ENABLE AND UVLO (EN PIN) | ||||||
| Enable threshold | Rising | 1.110 | 1.14 | 1.172 | V | |
| Falling | 1.080 | 1.11 | 1.148 | |||
| Input current | VEN = 1.1 V | 4.8 | 6.1 | 7.6 | μA | |
| Hysteresis current | VEN = 1.3 V | 2.4 | 3.0 | 3.9 | μA | |
| VOLTAGE REFERENCE | ||||||
| Internal voltage reference initial tolerance | 0 A ≤ Iout ≤ 18 A, 25℃ | 0.598 | 0.605 | 0.613 | V | |
| Internal voltage reference | 0 A ≤ Iout ≤ 18 A | –55℃ | 0.594 | 0.602 | 0.609 | V |
| –40℃ | 0.596 | 0.602 | 0.608 | |||
| 85℃ | 0.600 | 0.606 | 0.613 | |||
| 125℃ | 0.599 | 0.607 | 0.614 | |||
| REFCAP voltage | REFCAP = 470 nF | 1.189 | 1.209 | 1.228 | V | |
| MOSFET | ||||||
| High-side switch resistance(1) | PVIN = VIN = 3 V, lead length = 3 mm | –55℃ | 16 | 18 | m? | |
| 25℃ | 19 | 21 | ||||
| 125℃ | 23 | 27 | ||||
| PVIN = VIN = 5 V, lead length = 3 mm | –55℃ | 14 | 16 | |||
| 25℃ | 17 | 19 | ||||
| 125℃ | 20 | 23 | ||||
| PVIN = VIN = 7 V, lead length = 3 mm(3) |
–55℃ | 13 | 15 | |||
| 25℃ | 15 | 18 | ||||
| 125℃ | 19 | 22 | ||||
| Low-side switch resistance(1) | PVIN = VIN = 3 V, lead length = 3 mm | –55℃ | 7 | 11 | m? | |
| 25℃ | 9 | 12 | ||||
| 125℃ | 13 | 17 | ||||
| PVIN = VIN = 5 V, lead length = 3 mm | –55℃ | 6 | 10 | |||
| 25℃ | 9 | 11 | ||||
| 125℃ | 12 | 15 | ||||
| PVIN = VIN = 7 V, lead length = 3 mm(3) |
–55℃ | 5 | 9 | |||
| 25℃ | 8 | 10 | ||||
| 125℃ | 11 | 14 | ||||
| ERROR AMPLIFIER | ||||||
| Error amplifier input offset voltage | VSENSE = 0.6 V | –2 | 2.55 | mV | ||
| VSENSE pin input current | VSENSE = 0.6 V | –15 | 15 | nA | ||
| Error amplifier transconductance (gm) | –2 μA < ICOMP < 2 μA, V(COMP) = 1 V | 1150 | 1800 | 2400 | μS | |
| Error amplifier DC gain(2) | VSENSE = 0.6 V | 10000 | V/V | |||
| Error amplifier source | V(COMP) = 1 V, 100-mV input overdrive | 100 | 140 | 190 | μA | |
| Error amplifier sink | 100 | 140 | 190 | μA | ||
| Error amplifier output resistance | 7 | M? | ||||
| COMP to Iswitch gm(3) | COMP = 0.5 V | –55℃ | 28 | 38 | 49 | S |
| 25℃ | 29 | 40 | 50 | |||
| 125℃ | 30 | 41 | 52 | |||
| OVERCURRENT PROTECTION | ||||||
| High-side switch current limit threshold(3) | VIN = 7 V | 27 | 34 | A | ||
| Low-side switch sourcing overcurrent threshold(3) | VIN = 7 V | 25 | 32 | A | ||
| Low-side switch sinking overcurrent threshold(3) | VIN = 7 V | 3.5 | 6 | A | ||
| SLOPE COMPENSATION | ||||||
| Slope compensation(4) | fSW = 100 kHz, RSC = 1.1 M? | –1.2 | A/μs | |||
| fSW = 500 kHz, RSC = 196 k? | –6.0 | |||||
| fSW = 1000 kHz, RSC = 80.6 k? | –16.0 | |||||
| THERMAL SHUTDOWN | ||||||
| Thermal shutdown | 190 | °C | ||||
| Thermal shutdown hysteresis | 18 | °C | ||||
| INTERNAL SWITCHING FREQUENCY | ||||||
| Internally set frequency | RT = Open | VIN = 3 V | 444 | 473 | 515 | kHz |
| VIN = 5 V | 449 | 502 | 560 | |||
| Externally set frequency | RT = 1.07 MΩ (1%) | VIN = 3 V | 80 | 98 | 125 | kHz |
| VIN = 5 V | 80 | 100 | 125 | |||
| RT = 165 kΩ (1%) | VIN = 3 V | 455 | 495 | 535 | ||
| VIN = 5 V | 475 | 523 | 615 | |||
| RT = 73.2 kΩ (1%) | VIN = 3 V | 689 | 850 | 1011 | ||
| VIN = 5 V | 760 | 986 | 1212 | |||
| EXTERNAL SYNCHRONIZATION | ||||||
| SYNC1/SYNC2 out low-to-high rise time (10%/90%) | Cload = 25 pF | 70 | 180 | ns | ||
| SYNC1/SYNC2 out high-to-low fall time (90%/10%) | Cload = 25 pF | 10 | 21 | ns | ||
| SYNC2 to SYNC1 rising edge phase shift | 77 | 85 | 94 | ° | ||
| SYNC1 falling edge delay(3) | 165 | 180 | 185 | ° | ||
| SYNC1/SYNC2 out high level threshold | IOH = 50 μA | VIN – 0.3 | V | |||
| SYNC1/SYNC2 out low level threshold | IOL = 50 μA | 600 | mV | |||
| SYNC1/SYNC2 in low level threshold | PVIN = VIN = 3 V | 800 | mV | |||
| PVIN = VIN = 5 V | 800 | |||||
| PVIN = VIN = 7 V(3) | 800 | |||||
| SYNC1/SYNC2 in high level threshold | PVIN = VIN = 3 V | 2.25 | V | |||
| PVIN = VIN = 5 V | 3.5 | |||||
| PVIN = VIN = 7 V(3) | 4.9 | |||||
| SYNC1 in frequency range | PVIN = VIN = 5 V | 100 | 1000 | kHz | ||
| SYNC1 in duty cycle range | Duty cycle of external clock | 40 | 60 | % | ||
| PH (PH PIN) | ||||||
| Minimum on time | Measured at 10% to 90% of VIN, IPH = 2 A, VIN = 3 V |
190 | 235 | ns | ||
| Measured at 10% to 90% of VIN, IPH = 2 A, VIN = 5 V |
190 | 225 | ||||
| SOFT START AND TRACKING (SS/TR PIN) | ||||||
| SS charge current | 1.5 | 2.5 | 3 | μA | ||
| SS/TR to VSENSE matching(3) | V(SS/TR) = 0.3 V | 30 | 90 | mV | ||
| POWER GOOD (PWRGD PIN) | ||||||
| VSENSE threshold | VSENSE falling (fault) | 90 | 91 | %VREF | ||
| VSENSE rising (good) | 94 | 97 | ||||
| VSENSE rising (fault) | 109 | 111 | ||||
| VSENSE falling (good) | 103 | 106 | ||||
| Output high leakage | VSENSE = VREF, V(PWRGD) = 5 V | 30 | 181 | nA | ||
| Output low | I(PWRGD) = 2 mA | 0.3 | V | |||
| Minimum VIN for valid output | V(PWRGD) < 0.5 V at 100 μA | 0.6 | 1 | V | ||
| Minimum SS/TR voltage for PWRGD | 1.1 | V | ||||