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SLVSE55 November 2017 TPS65321A-Q1

PRODUCTION DATA.

封裝選項(xiàng)

機(jī)械數(shù)據(jù) (封裝 | 引腳)

PWP|14
- MPDS370A

散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)

PWP|14
- PPTD393A

訂購(gòu)信息

6 Specifications

6.1 Absolute Maximum Ratings⁽¹⁾

over operating free-air temperature (unless otherwise noted)

		MIN	MAX	UNIT
Supply inputs	VIN	–0.3	40	V
Supply inputs	VIN_LDO	–0.3	40	V
Control	EN1, EN2	–0.3	40	V
Control	EN1-VIN, EN2-VIN		1	V
Buck converter	FB1	–0.3	3.6	V
	SW	–0.3 –2 V for 30 ns	40	V
	BOOT	–0.3	46	V
	BOOT-SW		8	V
	COMP	–0.3	3.6	V
	SS	–0.3	3.6	V
	RT/CLK, SS	–0.3	3.6	V
	nRST	–0.3	7	V
LDO regulator	LDO_OUT	–0.3	7	V
LDO regulator	FB2	–0.3	7	V
Operating ambient temperature, T_A		-40	125	°C
Operating junction temperature, T_J		–40	150	°C
Storage temperature, T_stg		–55	165	°C

(1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

6.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾		±2000	V
		Charged-device model (CDM), per AEC Q100-011	All pins	±500
		Charged-device model (CDM), per AEC Q100-011	Corner pins (1, 7, 8, and 14)	±750

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

6.3 Recommended Operating Conditions

over operating free-air temperature range (unless otherwise noted)

		MIN	MAX	UNIT
Supply inputs	VIN	3.6	36	V
Supply inputs	VIN_LDO	3	36	V
Buck regulator	BOOT	3.6	42	V
	SW1	–1	36
	FB1	0	0.8
	SS	0	3
	COMP	0	3
	RT/CLK	0	3
	nRST	0	5.25
LDO regulator	LDO_OUT	1.1	5.5	V
LDO regulator	FB2	0	0.8	V
Control	EN1	0	36	V
Control	EN2	0	36	V
Temperature	Operating junction temperature range, T_J	–40	150	°C

6.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS65321A-Q1	UNIT
		PWP (HTSSOP)
		14 PINS
R_θJA	Junction-to-ambient thermal resistance	41.0	°C/W
R_θJC(top)	Junction-to-case (top) thermal resistance	33.1	°C/W
R_θJB	Junction-to-board thermal resistance	25.4	°C/W
ψ_JT	Junction-to-top characterization parameter	1.6	°C/W
ψ_JB	Junction-to-board characterization parameter	25.1	°C/W
R_θJC(bot)	Junction-to-case (bottom) thermal resistance	2.7	°C/W

(1) For more information about traditional and new thermal metrics, see the Semiconductor and IC Package Thermal Metrics application report.

6.5 Electrical Characteristics

V_I = 6 V to 27 V, EN1 = EN2 = V_I, over-operating free-air temperature range T_A = –40°C to 125°C and maximum operating junction temperature T_J = –150°C, unless otherwise noted. V_I is the voltage on the battery-supply pins, VIN and VIN_LDO.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
VIN (INPUT POWER SUPPLY)
	Operating input voltage	Normal mode, after initial start-up	3.6	12	36	V
	Shutdown supply current	V_(EN1) = V_(EN2) = 0 V, 25°C		2	7	μA
	Initial start-up voltage		6		36	V
ENABLE AND UVLO (EN1 AND EN2 PINS)
	Enable low level				0.7	V
	Enable high level		2.5			V
V_(VIN)(f)	Internal UVLO falling threshold	Ramp V_(VIN) down until output turns OFF	1.8	2.6	3	V
V_(VIN)(r)	Internal UVLO rising threshold	Ramp V_(VIN) up until output turns ON	2.2	2.8	3.2	V
BUCK REGULATOR
I_(Qon)	Operating: non-switching supply	Measured at the VIN pin V_(FB1) = 0.83 V, V_(VIN) = 12 V, 25°C		110	140	μA
	Output capacitance	ESR = 0.001 Ω to 0.1 Ω, large output capacitance may be required for load transient	10			μF
V_(ref1)	Voltage reference for FB1 pin	Buck regulator output: 1.1 V to 20 V. Buck regulator in Continuous Conducting Mode without Pulse-Skipping	0.788	0.8	0.812	V
	DC output voltage accuracy	Includes voltage references, DC load and line regulation, process and temperature	-2		2	%
DC_(LDR)	DC Load regulation, ΔV_OUT / V_OUT	I_OUT = 0 to I_OUTmax		0.5		%
T_(LDSR)	Transient load step response	V_(VIN) = 12V, I_OUT = 200 mA to 3A, T_R = T_F = 1 µs, Buck Output Voltage = 5V, ƒ_S = 2 MHz		5		%
BUCK REGULATOR: HIGH-SIDE MOSFET
r_{(DS(on) HS FET)}	On-resistance	V_(VIN) = 12 V, V_(SW) = 6 V		127	250	mΩ
t_onmin	Minimum on-time	ƒ_S = 2.5 MHz		115		ns
BUCK REGULATOR: CURRENT-LIMIT
	Current-limit threshold	V_(VIN) = 12 V, T_J = 25°C	4	6		A
BUCK REGULATOR: TIMING RESISTOR AND EXTERNAL CLOCK (RT/CLK PIN)
ƒ_S	Switching-frequency range	Under RT mode	100		2500	kHz
		Under fixed-frequency PWM mode, with 200 kΩ connected between RT/CLK and GND pins	523	585	640	kHz
		Under CLK mode	300		2200	kHz
	Minimum CLK input pulse width	Measures at CLK input = 2.2 MHz		30		ns
RT/CLK	High threshold			1.9	2.2	V
RT/CLK	Low threshold		0.5	0.7		V
RT/CLK	Falling edge to SW rising edge delay	Measured at 500 kHz with external clock connected to RT/CLK pin		60		ns
PLL	Lock-in time	Measured at 500 kHz		100		μs
BUCK REGULATOR: INTERNAL SOFT START TIMER
I_{Discharge(SS)}	Soft-start Pin Discharge Current	V_(SS) = 1 V, EN1=0, T_A = 25°C	50		400	μA
I_{Discharge(SS)}	Soft-start Pin Discharge Current	V_(SS) = 1 V, EN1=0, T_A = 125°C	33		400	μA
LDO REGULATOR
ΔV_O(ΔVI)	Line regulation	V_{(VIN_LDO)} = 6 V to 30 V, I_{(LDO_OUT)} = 10 mA, V_{(LDO_OUT)} = 3.3 V			20	mV
ΔV_O(ΔIL)	Load regulation	I_{(LDO_OUT)} = 10 mA to 200 mA, V_{(VIN_LDO)} = 12 V, V_{(LDO_OUT)} = 3.3 V			35	mV
V_DROPOUT	Dropout voltage (V_{(VIN_LDO)} – V_{(LDO_OUT)})	I_{(LDO_OUT)} = 200 mA		300	450	mV
I_{(LDO_OUT)}	Output current	V_{(LDO_OUT)} in regulation, V_(VIN) ≥ 4V			280	mA
V_{I(VIN_LDO)}	Operating input voltage on VIN_LDO pin	V_{(LDO_OUT)} in regulation	3		36	V
V_(ref2)	Voltage reference at FB2 pin	V_{(LDO_OUT)} = 1.1 V to 5.5 V	0.788	0.8	0.812	V
I_{CL(LDO_OUT)}	Output current-limit	V_{(LDO_OUT)} = 0 V (the LDO_OUT pin is shorted to ground)	280		1000	mA
I_Q(LDO)	Quiescent current	V(VIN) = 12 V Measured at VIN pin V_(EN1) = 0 V, V_(EN2) = 5 V, I_{(LDO_OUT)} = 0.01 mA to 0.75 mA		35	50	μA
PSRR	Power supply ripple rejection	V_{(VIN_LDO)(rip)} = 0.5 V_PP, I_{(LDO_OUT)} = 200 mA, frequency (ƒ) = 100 Hz, V_{(LDO_OUT)} = 5 V and V_{(LDO_OUT)} = 3.3 V		60		dB
PSRR	Power supply ripple rejection	V_{(VIN_LDO)(rip)} = 0.5 V_PP, I_{(LDO_OUT)} = 200 mA, ƒ = 150 kHz, V_{(LDO_OUT)} = 5 V and V_{(LDO_OUT)} = 3.3 V		30		dB
C_{(LDO_OUT)}	Output capacitor	ESR = 0.001 Ω to 100 mΩ, large output capacitance may be required for load transient V_{(LDO_OUT)} ≥ 3.3 V	1		40	μF
C_{(LDO_OUT)}	Output capacitor	ESR = 0.001 Ω to 100 mΩ, large output capacitance may be required for load transient 1.2 V ≤ V_{(LDO_OUT)} < 3.3 V	20		40	μF
BUCK REGULATOR: RESET (nRST Pin)
	RESET threshold	V_(FB1) decreasing	85%	90%	95%
V_OL	Output low	nRST pin asserted low due to falling V_(FB1), < 1-mA sinking current into nRST pin	0	0.045	0.4	V
	Filter time	Delay before asserting nRST low	7	14	21	μs
OVER TEMPERATURE PROTECTION
T_SD	Thermal-shutdown trip point			175		ºC
T_hys	Hysteresis			10		ºC