ZHCSN71E December 2021 – June 2024 TPS62A01 , TPS62A01A , TPS62A02 , TPS62A02A
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| SUPPLY | ||||||
| IQ(VIN) | VIN quiescent current | Non-switching; VEN = High; VFB = 610 mV; TPS62A01xDRL | 20 | μA | ||
| IQ(VIN) | VIN quiescent current | Non-switching; VEN = High; VFB = 610 mV; TPS62A01xDDC; TPS62A02 | 23 | μA | ||
| ISD(VIN) | VIN shutdown supply current | VEN = Low | 0.01 | 2 | μA | |
| UVLO | ||||||
| VUVLO(R) | VIN UVLO rising threshold | VIN rising | 2.3 | 2.4 | 2.5 | V |
| VUVLO(F) | VIN UVLO falling threshold | VIN falling | 2.2 | 2.3 | 2.4 | V |
| ENABLE | ||||||
| VEN(R) | EN voltage rising threshold | EN rising; enable switching | 1.2 | V | ||
| VEN(F) | EN voltage falling threshold | EN falling, disable switching | 0.4 | V | ||
| VEN(LKG) | EN Input leakage current | VEN = 5 V | 100 | nA | ||
| REFERENCE VOLTAGE | ||||||
| VFB | FB voltage | TJ = 0°C to 125°C, PWM mode | 594 | 600 | 606 | mV |
| VFB | FB voltage | PWM mode | 591 | 600 | 609 | mV |
| IFB(LKG) | FB input leakage current | VFB = 0.6 V | 100 | nA | ||
| SWITCHING FREQUENCY | ||||||
| fSW(FCCM) | Switching frequency, FPWM operation | VIN = 5 V; VOUT = 1.8 V | 2400 | kHz | ||
| STARTUP | ||||||
| Internal fixed soft-start time | From EN = High to VFB = 0.56 V | 1 | ms | |||
| POWER STAGE | ||||||
| RDSON(HS) | High-side MOSFET on-resistance | TPS62A01xDRL; VIN = 5 V | 180 | mΩ | ||
| RDSON(LS) | Low-side MOSFET on-resistance | TPS62A01xDRL; VIN = 5 V | 120 | mΩ | ||
| RDSON(HS) | High-side MOSFET on-resistance | VIN = 5 V; TPS62A01xDDC; TPS62A02 | 100 | mΩ | ||
| RDSON(LS) | Low-side MOSFET on-resistance | VIN = 5 V; TPS62A01xDDC; TPS62A02 | 67 | mΩ | ||
| OVERCURRENT PROTECTION | ||||||
| IHS(OC) | High-side peak current limit | TPS62A01 | 1.3 | 1.8 | A | |
| ILS(OC) | Low-side valley current limit | TPS62A01 | 1.8 | A | ||
| IHS(OC) | High-side peak current limit | TPS62A02 | 2.7 | 3.4 | A | |
| ILS(OC) | Low-side valley current limit | TPS62A02xDRL | 4.2 | A | ||
| ILS(OC) | Low-side valley current limit | TPS62A02xDDC | 3.15 | A | ||
| POWER GOOD | ||||||
| VPGTH | Power Good threshold | PG low, FB falling | 93.5 | % | ||
| VPGTH | Power Good threshold | PG high, FB rising | 96 | % | ||
| PG delay falling | 35 | μs | ||||
| PG delay rising | 10 | μs | ||||
| IPG(LKG) | PG pin Leakage current when open drain output is high | VPG = 5 V | 100 | nA | ||
| PG pin output low-level voltage | IPG = 1 mA | 400 | mV | |||
| OUTPUT DISCHARGE | ||||||
| Output discharge current on SW pin | VIN = 3 V, VOUT = 2.0 V; TPS62A01xDRL | 60 | mA | |||
| Output discharge current on SW pin | VIN = 3 V, VOUT = 2.0 V; TPS62A01xDDC; TPS62A02 | 76 | mA | |||
| THERMAL SHUTDOWN | ||||||
| TJ(SD) | Thermal shutdown threshold | Temperature rising | 170 | °C | ||
| TJ(HYS) | Thermal shutdown hysteresis | 20 | °C | |||