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ZHCSEO8C October 2015 – May 2017 TPS61193-Q1

PRODUCTION DATA.

封裝選項

機械數(shù)據(jù) (封裝 | 引腳)

PWP|20
- MHTS001H

散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)

PWP|20
- PPTD410

訂購信息

7 Specifications

7.1 Absolute Maximum Ratings

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾⁽²⁾

		MIN	MAX	UNIT
Voltage on pins	VIN, SW, FB	–0.3	50	V
	OUT1, OUT2, OUT3	–0.3	45
	LDO, SYNC, FSET, ISET, PWM, VDDIO/EN, FAULT	–0.3	5.5
Continuous power dissipation⁽³⁾		Internally Limited
Ambient temperature range T_A⁽⁴⁾		–40	125	°C
Junction temperature range T_J⁽⁴⁾		–40	150	°C
Maximum lead temperature (soldering)		See⁽⁵⁾
Storage temperature, T_stg		–65	150	°C

(1) Stresses beyond those listed under absolute maximum ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under recommended operating conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability.

(2) All voltages are with respect to the potential at the GND pins.

(3) Internal thermal shutdown circuitry protects the device from permanent damage. Thermal shutdown engages at T_J = 165°C (typical) and disengages at T_J = 145°C (typical).

(4) In applications where high power dissipation and/or poor package thermal resistance is present, the maximum ambient temperature may have to be derated. Maximum ambient temperature (T_A-MAX) is dependent on the maximum operating junction temperature (T_J-MAX-OP = 150°C), the maximum power dissipation of the device in the application (P_D-MAX), and the junction-to ambient thermal resistance of the part/package in the application (R_θJA), as given by the following equation: T_A-MAX = T_J-MAX-OP – (R_θJA × P_D-MAX).

(5) For detailed soldering specifications and information, refer to PowerPAD™ Thermally Enhanced Package .

7.2 ESD Ratings

				VALUE	UNIT
V_(ESD)	Electrostatic discharge	Human-body model (HBM), per AEC Q100-002⁽¹⁾		±2000	V
		Charged-device model (CDM), per AEC Q100-011	All other pins	±500
		Charged-device model (CDM), per AEC Q100-011	Corner pins (1,10,11,20)	±750

(1) AEC Q100-002 indicates that HBM stressing shall be in accordance with the ANSI/ESDA/JEDEC JS-001 specification.

7.3 Recommended Operating Conditions

Over operating free-air temperature range (unless otherwise noted)⁽¹⁾

		MIN	MAX	UNIT
Voltage on pins	VIN	4.5	45	V
	SW	0	45
	OUT1, OUT2, OUT3	0	40
	FB, FSET, LDO, ISET, VDDIO/EN, FAULT	0	5.25
	SYNC, PWM	0	VDDIO/EN

(1) All voltages are with respect to the potential at the GND pins.

7.4 Thermal Information

THERMAL METRIC⁽¹⁾		TPS61193-Q1	UNIT
		PWP (TSSOP)
		20 PINS
R_θJA	Junction-to-ambient thermal resistance⁽²⁾	44.2	°C/W
R_θJCtop	Junction-to-case (top) thermal resistance	26.5	°C/W
R_θJB	Junction-to-board thermal resistance	22.4	°C/W
ψ_JT	Junction-to-top characterization parameter	0.9	°C/W
ψ_JB	Junction-to-board characterization parameter	22.2	°C/W
R_θJCbot	Junction-to-case (bottom) thermal resistance	2.5	°C/W

(1) For more information about traditional and new thermal metrics, see Semiconductor and IC Package Thermal Metrics.

(2) Junction-to-ambient thermal resistance is highly application and board-layout dependent. In applications where high maximum power dissipation exists, special care must be paid to thermal dissipation issues in board design.

7.5 Electrical Characteristics⁽¹⁾⁽²⁾

T_J = −40°C to +125°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_Q	Standby supply current	Device disabled, V_VDDIO/EN = 0 V, V_IN = 12 V		4.5	20	μA
I_Q	Active supply current	V_IN = 12 V, V_OUT = 26 V, output current 80 mA/channel, converter ƒ_SW = 300 kHz		5	12	mA
V_{POR_R}	Power-on reset rising threshold	LDO pin voltage			2.7	V
V_{POR_F}	Power-on reset falling threshold	LDO pin voltage	1.5			V
T_TSD	Thermal shutdown threshold		150	165	175	°C
T_{TSD_HYST}	Thermal shutdown hysteresis			20		°C

(1) All voltages are with respect to the potential at the GND pins.

(2) Minimum and maximum limits are specified by design, test, or statistical analysis.

7.6 Internal LDO Electrical Characteristics

T_J = −40°C to +125°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_LDO	Output voltage	V_IN = 12 V	4.15	4.3	4.55	V
V_DR	Dropout voltage		120	300	430	mV
I_SHORT	Short circuit current			50		mA

7.7 Protection Electrical Characteristics

T_J = −40°C to +125°C (unless otherwise noted).

PARAMETER		MIN	TYP	MAX	UNIT
V_OVP	VIN OVP threshold voltage	41	42	44	V
V_UVLO	VIN UVLO		4		V
V_{UVLO_HYST}	VIN UVLO hysteresis		100		mV
	LED short detection threshold	5.6	6	7	V

7.8 Current Sinks Electrical Characteristics

T_J = −40°C to +125°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
I_LEAKAGE	Leakage current	Outputs OUT1 to OUT3 , V_OUTx = 45 V		0.1	5	µA
I_MAX	Maximum current	OUT1, OUT2, OUT3		100		mA
I_OUT	Output current accuracy	I_OUT = 100 mA	−5%		5%
I_MATCH	Output current matching⁽¹⁾	I_OUT = 100 mA, PWM duty =100%		1%	5%
V_SAT	Saturation voltage⁽²⁾	I_OUT = 100 mA		0.4	0.7	V

(1) Output Current Accuracy is the difference between the actual value of the output current and programmed value of this current. Matching is the maximum difference from the average. For the constant current sinks on the part (OUTx), the following are determined: the maximum output current (MAX), the minimum output current (MIN), and the average output current of all outputs (AVG). Matching number is calculated: (MAX-MIN)/AVG. The typical specification provided is the most likely norm of the matching figure for all parts. LED current sinks were characterized with 1-V headroom voltage. Note that some manufacturers have different definitions in use.

(2) Saturation voltage is defined as the voltage when the LED current has dropped 10% from the value measured at 1 V.

7.9 PWM Brightness Control Electrical Characteristics

T_J = −40°C to +125°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
ƒ_PWM	PWM input frequency		100		20 000	Hz
t_ON/OFF	Minimum on/off time⁽¹⁾			0.5		µs

(1) This specification is not ensured by ATE.

7.10 Boost and SEPIC Converter Characteristics

T_J = −40°C to +125°C (unless otherwise noted).
Unless otherwise specified: V_IN = 12 V, V_EN/VDDIO = 3.3 V, L = 22 μH, C_IN = 2 × 10-μF ceramic and 33-μF electrolytic,
C_OUT = 2 × 10-μF ceramic and 33-μF electrolytic, D = NRVB460MFS, ƒ_SW = 300 kHz.

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
V_IN	Input voltage		4.5		40	V
V_OUT	Output voltage		6		45
ƒ_{SW_MIN}	Minimum switching frequency (central frequency if spread spectrum is enabled)	Defined by R_FSET resistor		300		kHz
ƒ_{SW_MAX}	Maximum switching frequency (central frequency if spread spectrum is enabled)	Defined by R_FSET resistor		2 200		kHz
V_OUT/V_IN	Conversion ratio				10
T_OFF	Minimum switch OFF time⁽¹⁾	ƒ_SW ≥ 1.15 MHz			55	ns
I_{SW_MAX}	SW current limit		1.8	2	2.2	A
R_DSON	FET R_DSON	Pin-to-pin		240	400	mΩ
f_SYNC	External SYNC frequency		300		2 200	kHz
t_{SYNC_ON_MIN}	External SYNC minimum on time⁽¹⁾			150		ns
t_{SYNC_OFF_MIN}	External SYNC minimum off time⁽¹⁾			150		ns

(1) This specification is not ensured by ATE.

7.11 Logic Interface Characteristics

T_J = −40°C to +125°C (unless otherwise noted).

PARAMETER		TEST CONDITIONS	MIN	TYP	MAX	UNIT
LOGIC INPUT VDDIO/EN
V_IL	Input low level				0.4	V
V_IH	Input high level		1.65			V
I_I	Input current		−1	5	30	µA
LOGIC INPUT SYNC/FSET, PWM
V_IL	Input low level				0.2 × VDDIO/EN	V
V_IH	Input high level		0.8 × VDDIO/EN			V
I_I	Input current		−1		1	μA
LOGIC OUTPUT FAULT
V_OL	Output low level	Pullup current 3 mA		0.3	0.5	V
I_LEAKAGE	Output leakage current	V = 5.5 V			1	μA