| OUT – POWER SWITCH |
| rDS(on) |
On-resistance(1) |
TJ = 25°C |
|
45 |
55 |
mΩ |
| –40°C ≤ TJ ≤ 85°C |
|
45 |
69 |
| –40°C ≤TJ ≤ 125°C |
|
45 |
77 |
| Ilkg |
Reverse leakage current |
VOUT = 6.5 V, VIN = VEN = 0 V, –40°C ≤ TJ ≤ 85°C, measure I(IN) |
|
0.01 |
2 |
µA |
| OUT – DISCHARGE |
| R(DCHG) |
Discharge resistance (mode change) |
|
400 |
500 |
630 |
Ω |
| CTL1, CTL2, EN, OVP_SEL INPUTS |
|
Input pin rising logic threshold voltage |
|
1 |
1.35 |
2 |
V |
|
Input pin falling logic threshold voltage |
|
0.85 |
1.15 |
1.65 |
V |
|
Hysteresis(2) |
|
|
200 |
|
mV |
|
Input current |
Pin voltage = 0 V or 6.5 V |
–1 |
|
1 |
µA |
| CURRENT LIMIT |
| IOS |
OUT short-circuit current limit |
R(ILIM_LO) = 210 kΩ |
190 |
240 |
290 |
mA |
| R(ILIM_LO) = 80.6 kΩ |
555 |
620 |
680 |
| R(ILIM_LO) = 21.5 kΩ |
2145 |
2300 |
2460 |
| R(ILIM_LO) = 19.1 kΩ |
2420 |
2590 |
2760 |
| R(ILIM_HI) = 18.2 kΩ |
2545 |
2720 |
2895 |
| R(ILIM_HI) = 14.3 kΩ |
3240 |
3455 |
3670 |
| R(ILIM_HI) shorted to GND |
5000 |
6500 |
8000 |
| SUPPLY CURRENT |
| I(IN_OFF) |
Disabled IN supply current |
V(EN) = 0 V, V(OUT) = 0 V, –40°C ≤ TJ ≤ 85°C, no 5.1-kΩ resistor (open) between BIAS and OUT |
|
0.1 |
5 |
µA |
| I(IN_ON) |
Enabled IN supply current |
SDP mode (CTL1, CTL2 = 0, 1) |
|
170 |
250 |
µA |
| CDP mode (CTL1, CTL2 = 1, 1) |
|
200 |
280 |
| Client mode (CTL1, CTL2 = 0, 0) |
|
120 |
210 |
| UNDERVOLTAGE LOCKOUT, IN |
| V(UVLO) |
UVLO threshold voltage |
IN rising |
3.9 |
4.15 |
4.3 |
V |
|
Hysteresis(3) |
TJ = 25°C |
|
100 |
|
mV |
| FAULT |
|
Output low voltage |
I(FAULT) = 1 mA |
|
|
100 |
mV |
|
Off-state leakage |
V(FAULT) = 6.5 V |
|
|
2 |
µA |
| STATUS |
|
Output low voltage |
I(STATUS) = 1 mA |
|
|
100 |
mV |
|
Off-state leakage |
V(STATUS) = 6.5 V |
|
|
2 |
µA |
| THERMAL SHUTDOWN |
| T(OTSD2) |
Thermal shutdown threshold |
|
155 |
|
|
°C |
| T(OTSD1) |
Thermal shutdown threshold in current-limit |
|
135 |
|
|
°C |
|
Hysteresis(3) |
|
|
20 |
|
°C |
| LOAD DETECT (VCTL1 = VCTL2 = VIN) |
| I(LD) |
IOUT load detection threshold |
R(ILIM_LO) = 80.6 kΩ, rising load current |
585 |
650 |
715 |
mA |
|
Hysteresis(3) |
|
|
50 |
|
mA |
| DM_IN AND DP_IN OVERVOLTAGE PROTECTION |
| V(OV_Data) |
Protection trip threshold |
DP_IN and DM_IN rising |
3.7 |
3.9 |
4.15 |
V |
|
Hysteresis(3) |
|
|
100 |
|
mV |
| R(DCHG_Data) |
Discharge resistor after OVP(2) |
DP_IN = DM_IN = 18 V, IN = 5 V or 0 V |
|
200 |
|
kΩ |
| DP_IN = DM_IN = 5 V, IN = 5 V |
|
370 |
|
| DP_IN = DM_IN = 5 V, IN = 0 |
|
390 |
|
| OUT OVERVOLTAGE PROTECTION |
| V(OV_OUT_LOW) |
Protection trip threshold |
OUT rising |
5.65 |
6 |
6.35 |
V |
|
Hysteresis(3) |
|
|
90 |
|
mV |
| V(OV_OUT_HIGH) |
Protection trip threshold |
OUT rising |
6.6 |
6.95 |
7.3 |
V |
|
Hysteresis(3) |
|
|
130 |
|
mV |
| R(DCHG_OUT) |
Discharge resistor |
OUT = 18 V, IN = 5 V |
|
55 |
85 |
kΩ |
| OUT = 18 V, IN = 0 |
|
80 |
120 |
| CABLE COMPENSATION |
| I(CS) |
Sink current |
Load = 3 A, 2.5 V ≤ V(CS) ≤ 6.5 V |
234 |
246 |
258 |
µA |
| Load = 2.4 A, 2.5 V ≤ V(CS) ≤ 6.5 V |
187 |
197 |
207 |
| Load = 2.1 A, 2.5 V ≤ V(CS) ≤ 6.5 V |
163 |
172 |
181 |
| Load = 1 A, 2.5 V ≤ V(CS) ≤ 6.5 V |
77 |
82 |
87 |
| CURRENT MONITOR OUTPUT (IMON) |
| I(IMON) |
Source current |
Load = 3 A, 0 ≤ V(IMON) ≤ 2.5 V |
287 |
312 |
337 |
µA |
| Load = 2.4 A, 0 ≤ V(IMON) ≤ 2.5 V |
230 |
250 |
270 |
| Load = 2.1 A, 0 ≤ V(IMON) ≤ 2.5 V |
201 |
218 |
235 |
| Load = 1 A, 0 ≤ V(IMON) ≤ 2.5 V |
94 |
104 |
114 |
| Load = 0.5 A, 0 ≤ V(IMON) ≤ 2.5 V |
44 |
52 |
60 |
| HIGH-BANDWIDTH ANALOG SWITCH |
| R(HS_ON) |
DP and DM switch on-resistance |
V(DP_OUT) = V(DM_OUT) = 0 V, I(DP_IN) = I(DM_IN) = 30 mA |
|
3.2 |
6.5 |
Ω |
| V(DP_OUT) = V(DM_OUT) = 2.4 V, I(DP_IN) = I(DM_IN) = –15 mA |
|
3.8 |
7.6 |
| |ΔR(HS_ON)| |
Switch resistance mismatch between DP and DM channels |
V(DP_OUT) = V(DM_OUT) = 0 V, I(DP_IN) = I(DM_IN) = 30 mA |
|
0.05 |
0.15 |
Ω |
| V(DP_OUT) = V(DM_OUT) = 2.4 V, I(DP_IN) = I(DM_IN) = –15 mA |
|
0.05 |
0.15 |
| C(IO_OFF) |
DP and DM switch off-state capacitance(4) |
VEN = 0 V, V(DP_IN) = V(DM_IN) = 0.3 V, Vac = 0.03 VPP , f = 1 MHz |
|
8.8 |
|
pF |
| C(IO_ON) |
DP and DM switch on-state capacitance(4) |
V(DP_IN) = V(DM_IN) = 0.3 V, Vac = 0.03 VPP, f = 1 MHz |
|
10.9 |
|
pF |
|
Off-state isolation(3) |
V(EN) = 0 V, f = 250 MHz |
|
8 |
|
dB |
|
On-state cross-channel isolation(4) |
f = 250 MHz |
|
30 |
|
dB |
| Ilkg(OFF) |
Off-state leakage current |
VEN = 0 V, V(DP_IN) = V (DM_IN) = 3.6 V, V(DP_OUT) = V(DM_OUT) = 0 V, measure I(DP_OUT) and I(DM_OUT) |
|
0.1 |
1.5 |
µA |
| BW |
Bandwidth (–3 dB)(4) |
R(L) = 50 Ω |
|
940 |
|
MHz |
| CHARGING DOWNSTREAM PORT DETECT |
| V(DM_SRC) |
DM_IN CDP output voltage |
V(DP_IN) = 0.6 V, –250 µA < I(DM_IN) < 0 µA |
0.5 |
0.6 |
0.7 |
V |
| V(DAT_REF) |
DP_IN rising lower window threshold for V(DM_SRC) activation |
|
0.36 |
|
0.4 |
V |
|
Hysteresis(4) |
|
|
50 |
|
mV |
| V(LGC_SRC) |
DP_IN rising upper window threshold for VDM_SRC de-activation |
|
0.8 |
|
0.88 |
V |
| V(LGC_SRC_HYS) |
Hysteresis(4) |
|
|
100 |
|
mV |
| I(DP_SINK) |
DP_IN sink current |
V(DP_IN) = 0.6 V |
40 |
75 |
100 |
µA |