ZHCSLC3B may 2020 – april 2023 TPD3S713-Q1 , TPD3S713A-Q1
PRODUCTION DATA
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| OUT – POWER SWITCH | ||||||
| rDS(on) | On-resistance(1) | TJ = 25°C | 73 | 90 | mΩ | |
| –40°C ≤TJ ≤ 125°C | 73 | 120 | ||||
| Ilkg | Reverse leakage current | VBUS = 5 V, VIN = VEN = 0 V, –40°C ≤ TJ ≤ 125°C, measure I(IN) | 0.01 | 2 | μA | |
| OUT – DISCHARGE | ||||||
| R(DCHG) | Discharge resistance (ILIM_SEL change) | 400 | 500 | 630 | Ω | |
| ENABLE, ILIM_SEL, INT1, INT2 INPUTS | ||||||
| Input pin rising logic threshold voltage | 0.8 | 1.35 | 2 | V | ||
| Input pin falling logic threshold voltage | 0.7 | 1.15 | 1.65 | V | ||
| Hysteresis(2) | 200 | mV | ||||
| Input current | Pin voltage = 0 V or 5.5 V | –1 | 1 | μA | ||
| CURRENT LIMIT | ||||||
| IOS | VBUS short-circuit current limit | RILIM_HI or RILIM_LO = 80.6 kΩ | 38 | 55 | 71 | mA |
| RILIM_HI or RILIM_LO = 52.3 kΩ | 62 | 82 | 102 | |||
| RILIM_HI or RILIM_LO = 22.1 kΩ | 166 | 192 | 218 | |||
| RILIM_HI or RILIM_LO = 15.4 kΩ | 245 | 275 | 305 | |||
| RILIM_HI or RILIM_LO = 6.98 kΩ | 560 | 600 | 640 | |||
| RILIM_HI Shorted to GND | 860 | 1150 | 1440 | |||
| RILIM_HI Shorted to GND | ||||||
| I(IN_OFF) | Disabled IN supply current | V(EN) = 0 V, V(BUS) = 0 V, –40°C ≤ TJ ≤ 125°C, no 5.1-k? resistor (open) between BIAS and VBUS | 0.1 | 10 | μA | |
| I(IN_ON) | Enabled IN supply current | V(INT1) = V(ILIM_SEL) = High | 200 | 280 | μA | |
| UNDERVOLTAGE LOCKOUT, IN | ||||||
| V(UVLO) | UVLO threshold voltage | IN rising | 3.9 | 4.1 | 4.3 | V |
| IN falling | 3.3 | 3.5 | 3.7 | |||
| FAULT | ||||||
| Output low voltage | I(FAULT) = 1 mA | 100 | mV | |||
| Off-state leakage | V(FAULT) = 5.5 V | 2 | μA | |||
| THERMAL SHUTDOWN | ||||||
| T(OTSD2) | Thermal shutdown threshold | 155 | °C | |||
| T(OTSD1) | Thermal shutdown threshold in current-limit | 135 | °C | |||
| Hysteresis(3) | 20 | °C | ||||
| DM_IN AND DP_IN OVERVOLTAGE PROTECTION | ||||||
| V(OV_Data) | Protection trip threshold | DP_IN and DM_IN rising | 3.3 | 3.9 | 4.15 | V |
| Hysteresis(3) | 100 | mV | ||||
| R(DCHG_Data) | Discharge resistor after OVP(3) | DP_IN = DM_IN = 18 V, IN = 5 V or 0 V | 200 | k? | ||
| DP_IN = DM_IN = 5 V, IN = 5 V | 370 | |||||
| DP_IN = DM_IN = 5 V, IN = 0 | 390 | |||||
| BUS OVERVOLTAGE PROTECTION | ||||||
| V(OV_BUS) | Protection trip threshold | VBUS rising | 5.65 | 6 | 6.35 | V |
| Hysteresis(3) | 90 | mV | ||||
| R(DCHG_BUS) | Discharge resistor | VBUS = 18 V, IN = 5 V | 55 | 85 | k? | |
| VBUS = 18 V, IN = 0 | 80 | 120 | ||||
| CABLE COMPENSATION | ||||||
| I(CS) | Sink current | Load = 0.5 A, 2.5 V ≤ V(CS) ≤ 5.5 V | 190 | 210 | 230 | μA |
| CURRENT MONITOR OUTPUT (IMON) | ||||||
| I(IMON) | Source current | Load = 0.5 A, 0 ≤ V(IMON) ≤ 2.5 V | 245 | 265 | 285 | μA |
| HIGH-BANDWIDTH ANALOG SWITCH | ||||||
| R(HS_ON) | DP and DM switch on-resistance | V(DP_OUT) = V(DM_OUT) = 0 V, I(DP_IN) = I(DM_IN) = 30 mA | 3.2 | 6.5 | Ω | |
| V(DP_OUT) = V(DM_OUT) = 2.4 V, I(DP_IN) = I(DM_IN) = –15 mA | 3.8 | 7.6 | ||||
| |ΔR(HS_ON)| | Switch resistance mismatch between DP and DM channels | V(DP_OUT) = V(DM_OUT) = 0 V, I(DP_IN) = I(DM_IN) = 30 mA | 0.05 | 0.15 | Ω | |
| V(DP_OUT) = V(DM_OUT) = 2.4 V, I(DP_IN) = I(DM_IN) = –15 mA | 0.05 | 0.15 | ||||
| C(IO_OFF) | DP and DM switch off-state capacitance(4) | VEN = 0 V, V(DP_IN) = V(DM_IN) = 0.3 V, Vac = 0.03 VPP, f = 1 MHz | 8.8 | pF | ||
| C(IO_ON) | DP and DM switch on-state capacitance(4) | V(DP_IN) = V(DM_IN) = 0.3 V, Vac = 0.03 VPP, f = 1 MHz | 10.9 | pF | ||
| Off-state isolation(4) | V(EN) = 0 V, f = 250 MHz | 12 | dB | |||
| On-state cross-channel isolation(4) | f = 250 MHz | 34 | dB | |||
| Ilkg(OFF) | Off-state leakage current | VEN = 0 V, V(DP_IN) = V(DM_IN) = 3.6 V, V(DP_OUT) = V(DM_OUT) = 0 V, measure I(DP_OUT) and I(DM_OUT) | 0.1 | 1.5 | μA | |
| BW | Bandwidth (–3 dB)(4) | R(L) = 50 Ω | 1230 | MHz | ||