ZHCSI62J August 2018 – February 2024 TLV9051 , TLV9052 , TLV9054
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說明
- 4 Device Comparison Table
- 5 Pin Configuration and Functions
-
6 Specifications
- 6.1 Absolute Maximum Ratings
- 6.2 ESD Ratings
- 6.3 Recommended Operating Conditions
- 6.4 Thermal Information for Single Channel
- 6.5 Thermal Information for Dual Channel
- 6.6 Thermal Information for Quad Channel
- 6.7 Electrical Characteristics: VS (Total Supply Voltage) = (V+) – (V–) = 1.8 V to 5.5 V
- 6.8 Typical Characteristics
- 7 Detailed Description
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
封裝選項
機械數(shù)據(jù) (封裝 | 引腳)
散熱焊盤機械數(shù)據(jù) (封裝 | 引腳)
- DPW|5
訂購信息
5 Pin Configuration and Functions
Figure 5-1 TLV9051 DBV, DRL Packages5-Pin SOT-23, SOT-553Top View
Figure 5-3 TLV9051 DPW Package
5-Pin X2SONTop View
Figure 5-2 TLV9051 DCK Package
5-Pin SC70Top ViewTable 5-1 Pin Functions: TLV9051
| PIN | I/O | DESCRIPTION | ||||
|---|---|---|---|---|---|---|
| NAME | SOT-23, SOT-553 |
SC-70 | X2SON | |||
| IN– | 4 | 3 | 2 | I | Inverting input | |
| IN+ | 3 | 1 | 4 | I | Noninverting input | |
| OUT | 1 | 4 | 1 | O | Output | |
| V– | 2 | 2 | 3 | — | Negative (low) supply or ground (for single-supply operation) | |
| V+ | 5 | 5 | 5 | — | Positive (high) supply | |
Figure 5-4 TLV9051S DBV Package
6-Pin SOT-23Top
ViewTable 5-2 Pin Functions: TLV9051S
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| –IN | 4 | I | Inverting input |
| +IN | 3 | I | Noninverting input |
| OUT | 1 | O | Output |
| SHDN | 5 | I | Shutdown: low = amp disabled, high = amp enabled. See Section 7.3.9 for more information. |
| V– | 2 | — | Negative (lowest) supply or ground (for single-supply operation). |
| V+ | 6 | — | Positive (highest) supply |
Figure 5-5 TLV9052 D, DGK, PW, DDF Packages8-Pin SOIC, VSSOP, TSSOP, SOT-23Top View
Connect
exposed thermal pad to V–. See Section 7.3.6 for more information.
Figure 5-6 TLV9052 DSG Package8-Pin WSON With Exposed Thermal PadTop ViewTable 5-3 Pin Functions: TLV9052
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| IN1– | 2 | I | Inverting input, channel 1 |
| IN1+ | 3 | I | Noninverting input, channel 1 |
| IN2– | 6 | I | Inverting input, channel 2 |
| IN2+ | 5 | I | Noninverting input, channel 2 |
| OUT1 | 1 | O | Output, channel 1 |
| OUT2 | 7 | O | Output, channel 2 |
| V– | 4 | — | Negative (low) supply or ground (for single-supply operation) |
| V+ | 8 | — | Positive (high) supply |
Figure 5-7 TLV9052S DGS Package
10-Pin VSSOPTop View
Figure 5-8 TLV9052S RUG Package
10-Pin X2QFNTop ViewTable 5-4 Pin Functions:
TLV9052S
| PIN | I/O | DESCRIPTION | ||
|---|---|---|---|---|
| NAME | VSSOP | X2QFN | ||
| IN1– | 2 | 9 | I | Inverting input, channel 1 |
| IN1+ | 3 | 10 | I | Noninverting input, channel 1 |
| IN2– | 8 | 5 | I | Inverting input, channel 2 |
| IN2+ | 7 | 4 | I | Noninverting input, channel 2 |
| OUT1 | 1 | 8 | O | Output, channel 1 |
| OUT2 | 9 | 6 | O | Output, channel 2 |
| SHDN1 | 5 | 2 | I | Shutdown: low = amp disabled, high = amp enabled, channel 1. See Section 7.3.9 for more information. |
| SHDN2 | 6 | 3 | I | Shutdown: low = amp disabled, high = amp enabled, channel 2. See Section 7.3.9 for more information. |
| V– | 4 | 1 | — | Negative (low) supply or ground (for single-supply operation) |
| V+ | 10 | 7 | — | Positive (high) supply |
Figure 5-9 TLV9054 D, PW Packages14-Pin SOIC, TSSOPTop View
Connect
exposed thermal pad to V–. See Section 7.3.6 for more information.
Figure 5-11 TLV9054 RTE Package16-Pin WQFN With Exposed Thermal PadTop View
Figure 5-10 TLV9054 RUC Package14-Pin X2QFNTop ViewTable 5-5 Pin Functions: TLV9054
| PIN | I/O | DESCRIPTION | |||
|---|---|---|---|---|---|
| NAME | SOIC, TSSOP | WQFN | X2QFN | ||
| IN1– | 2 | 16 | 1 | I | Inverting input, channel 1 |
| IN1+ | 3 | 1 | 2 | I | Noninverting input, channel 1 |
| IN2– | 6 | 4 | 5 | I | Inverting input, channel 2 |
| IN2+ | 5 | 3 | 4 | I | Noninverting input, channel 2 |
| IN3– | 9 | 9 | 8 | I | Inverting input, channel 3 |
| IN3+ | 10 | 10 | 9 | I | Noninverting input, channel 3 |
| IN4– | 13 | 13 | 12 | I | Inverting input, channel 4 |
| IN4+ | 12 | 12 | 11 | I | Noninverting input, channel 4 |
| NC | — | 6, 7 | — | — | No internal connection |
| OUT1 | 1 | 15 | 14 | O | Output, channel 1 |
| OUT2 | 7 | 5 | 6 | O | Output, channel 2 |
| OUT3 | 8 | 8 | 7 | O | Output, channel 3 |
| OUT4 | 14 | 14 | 13 | O | Output, channel 4 |
| V– | 11 | 11 | 10 | — | Negative (low) supply or ground (for single-supply operation) |
| V+ | 4 | 2 | 3 | — | Positive (high) supply |
Connect exposed
thermal pad to V–. See Section 7.3.6 for more information.
Figure 5-12 TLV9054S RTE Package16-Pin WQFN With
Exposed Thermal PadTop ViewTable 5-6 Pin Functions: TLV9054S
| PIN | I/O | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| IN1+ | 1 | I | Noninverting input, channel 1 |
| IN1– | 16 | I | Inverting input, channel 1 |
| IN2+ | 3 | I | Noninverting input, channel 2 |
| IN2– | 4 | I | Inverting input, channel 2 |
| IN3+ | 10 | I | Noninverting input, channel 3 |
| IN3– | 9 | I | Inverting input, channel 3 |
| IN4+ | 12 | I | Noninverting input, channel 4 |
| IN4– | 13 | I | Inverting input, channel 4 |
| SHDN12 | 6 | I | Shutdown: low = amp disabled, high = amp enabled, channel 1 and 2. See Section 7.3.9 for more information. |
| SHDN34 | 7 | I | Shutdown: low = amp disabled, high = amp enabled, channel 3 and 4. See Section 7.3.9 for more information. |
| OUT1 | 15 | O | Output, channel 1 |
| OUT2 | 5 | O | Output, channel 2 |
| OUT3 | 8 | O | Output, channel 3 |
| OUT4 | 14 | O | Output, channel 4 |
| V– | 11 | — | Negative (low) supply or ground (for single-supply operation) |
| V+ | 2 | — | Positive (high) supply |