ZHCSP57A october 2006 – may 2023 TLV3011-EP , TLV3012-EP
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| OFFSET VOLTAGE | ||||||
| VOS | Input offset voltage | VCM = (V–) | –6 | ±0.3 | 6 | mV |
| VOS | Input offset voltage | VCM = (V–) TA = –55°C to +125°C |
–9 | 9 | mV | |
| dVIO/dT | Input offset voltage drift | VCM = (V–) TA = –55°C to +125°C |
±12 | μV/°C | ||
| PSRR | power supply rejection ratio | VCM = (V–) VS = 1.65 V to 5.5 V TA = –55°C to +125°C |
100 | 1000 | μV/V | |
| VHYS | Input hysteresis voltage | TA = –55°C to +125°C | 2 | 6 | 8 | mV |
| INPUT BIAS CURRENT | ||||||
| IB | Input bias current | VCM = VS /2 | –10(1) | ±4.5 | 10(1) | pA |
| IOS | Input offset current | VCM = VS /2 | –10(1) | ±1 | 10(1) | pA |
| INPUT COMMON MODE RANGE | ||||||
| VCM-Range | Common-mode voltage range | VS = 1.8 V to 5.5 V TA = –55°C to +125°C |
(V–) – 0.2 | (V+) + 0.2 | V | |
| CMRR | Common mode rejection ratio | VCM = (V–) + 1.5V to (V+) + 0.2V TA = –55°C to +125°C |
60 | 74 | dB | |
| CMRR | Common mode rejection ratio | VCM = (V–) - 0.2V to (V+) + 0.2V TA = –55°C to +125°C |
54 | 62 | dB | |
| RCM | Input Common Mode Resistance | 1013 | ? | |||
| CIC | Input Common Mode Capacitance | 2 | pF | |||
| INPUT IMPEDANCE | ||||||
| RDM | Input Differential Mode Resistance | 1013 | ? | |||
| CID | Input Differential Mode Capacitance | 4 | pF | |||
| OUTPUT | ||||||
| VOL | Voltage swing from (V–) | VS = 5 V ISINK = 5 mA TA = –55°C to +125°C |
160 | 200 | mV | |
| VOH | Voltage swing from (V+) | VS = 5 V ISOURCE = 5 mA TA = –55°C to +125°C |
90 | 200 | mV | |
| VOLTAGE REFERENCE | ||||||
| VOUT | Reference Voltage | 1.223 | 1.242 | 1.260 | V | |
| Accuracy | ±0.25% | ±1.5% | ||||
| dVOUT/dT | Temperature Drift | TA = –55°C to +125°C | 40 | 100 | ppm/℃ | |
| dVOUT/dILOAD | Load Regulation, Sourcing | 0 mA < ISOURCE ≤ 0.5 mA | 0.36 | 1(1) | mV/mA | |
| Load Regulation, Sinking | 0 mA < ISINK ≤ 0.5 mA | 6.6 | mV/mA |
|||
| ILOAD | Output Current | 0.5 | mA | |||
| dVOUT/dVS | Line Regulation | 1.65 V ≤ VS ≤ 5.5 V | 10 | 100(1) | μV/V | |
| Vnoise | Noise | f = 0.1 Hz to 10 Hz | 0.2 | mVPP | ||
| POWER SUPPLY | ||||||
| IQ | Quiescent current per comparator | Output is logic high | 2.4 | 3.1 | μA | |
| IQ | Quiescent current per comparator | Output is logic high TA = –55°C to +125°C |
3.6 | μA | ||