ZHCSQ68A May 2022 – December 2022 TLIN1431-Q1
PRODUCTION DATA
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
PWM1_CNTL3 is shown in Figure 8-77 and described in Table 8-33
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Bits 0 - 7 of the 10-bit PWM1. Used with register h'20[1:0] PWM1_CNTL2.
| 7 | 6 | 5 | 4 | 3 | 2 | 1 | 0 |
| PWM1_DC | |||||||
| R/W-00h | |||||||
| Bit | Field | Type | Reset | Description |
|---|---|---|---|---|
| 7 | PWM1_DC | R/W | 00h | Bits 0 - 7 of the 10-bit PWM1 00h = 100% off when used with 'h20[1:0] = 00b xxh = On time with an increase of ~ 0.1% when used with 'h20[1:0] FFh = 100% on when used with 'h20[1:0] = 11b |