ZHCSOO2B December 2022 – March 2024 THVD2410V , THVD2412V , THVD2450V , THVD2452V
PRODUCTION DATA
- 1
- 1 特性
- 2 應(yīng)用
- 3 說(shuō)明
- 4 Pin Configuration and Functions
-
5 Specifications
- 5.1 Absolute Maximum Ratings
- 5.2 ESD Ratings
- 5.3 ESD Ratings [IEC]
- 5.4 Recommended Operating Conditions
- 5.5 Thermal Information
- 5.6 Power Dissipation
- 5.7 Electrical Characteristics
- 5.8 Switching Characteristics_250 kbps
- 5.9 Switching Characteristics_1 Mbps
- 5.10 Switching Characteristics_20 Mbps
- 5.11 Switching Characteristics_50 Mbps
- 5.12 Typical Characteristics
- 6 Parameter Measurement Information
- 7 Detailed Description
- 8 Application and Implementation
- 9 Device and Documentation Support
- 10Revision History
- 11Mechanical, Packaging, and Orderable Information
封裝選項(xiàng)
機(jī)械數(shù)據(jù) (封裝 | 引腳)
- D|14
散熱焊盤機(jī)械數(shù)據(jù) (封裝 | 引腳)
訂購(gòu)信息
4 Pin Configuration and Functions
Figure 4-1 THVD2410V, THVD2450V
10-Pin DRC Package (VSON)
Top View
10-Pin DRC Package (VSON)
Top View
Table 4-1 Pin Functions
| NO. | NAME | TYPE | DESCRIPTION |
|---|---|---|---|
| 1 | VIO | Logic Supply | Supply for logic I/O signals (R, RE, D, DE, and SLR) |
| 2 | R | Digital Output | Receive data output |
| 3 | DE | Digital Input | Driver enable input; integrated pull-down |
| 4 | RE | Digital Input | Receiver enable input; integrated pull-up |
| 5 | D | Digital Input | Transmission data input; integrated pull-up |
| 6 | GND | Reference Potential | Local device ground |
| 7 | SLR | Digital Input | Slew rate select. For THVD2410V: Low = 1 Mbps, High = 250 kbps. Defaults to 1 Mbps if SLR is left floating. For THVD2450V: Low = 50 Mbps, High = 20 Mbps. Defaults to 50 Mbps if left floating. |
| 8 | A | Bus I/O | RS 485 bus I/O, A |
| 9 | B | Bus I/O | RS 485 bus I/O, B |
| 10 | VCC | Bus Supply | Bus supply |
| Thermal Pad | -- | Connect to GND for optimal thermal performance |
Figure 4-2 THVD2412V, THVD2452V14-Pin SOIC Package (D)
Top View
Table 4-2 Pin functions
| NO. | NAME | TYPE | DESCRIPTION |
|---|---|---|---|
| 1 | VIO | Logic supply | 1.65 V to 5.5 V supply for logic I/O signals (R, RE, D, DE and SLR) |
| 2 | R | Digital output | Receive data output |
| 3 | RE | Digital input | Receiver enable input; integrated pull-up |
| 4 | DE | Digital input | Driver enable input; integrated pull-down |
| 5 | D | Digital input | Transmission data input; integrated pull-up |
| 6 | GND | Reference potential | Local device ground |
| 7 | NC | No connect | Not connected internally |
| 8 | SLR | Digital input | Slew rate select. For THVD2412V: Low = 1 Mbps, High = 250 kbps. Defaults to 1 Mbps if SLR is left floating. For THVD2452V: Low = 50 Mbps, High = 20 Mbps. Defaults to 50 Mbps if left floating. |
| 9 | Y | Bus output | RS 485 driver non-inverting output |
| 10 | Z | Bus output | RS 485 driver inverting output |
| 11 | B | Bus input | RS 485 receiver inverting input |
| 12 | A | Bus input | RS 485 receiver non-inverting input |
| 13 | NC | No connect | Not connected internally |
| 14 | VCC | Bus supply | 3 V to 5.5 V bus supply |