ZHCSQ49A December 2022 – June 2024 TCAN3403-Q1 , TCAN3404-Q1
PRODUCTION DATA
| PARAMETER | TEST CONDITIONS | MIN | TYP | MAX | UNIT | |
|---|---|---|---|---|---|---|
| Device Switching Characteristics | ||||||
| tPROP(LOOP1) | Total loop delay, driver input (TXD) to receiver output (RXD), recessive to dominant | See Figure 7-4, normal mode, VCC = VIO = 3 V to 3.6 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF TCAN3404, TCAN3403 |
95 | 180 | ns | |
| See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF TCAN3403 |
102 | 190 | ns | |||
| See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF TCAN3403 |
115 | 210 | ns | |||
| tPROP(LOOP2) | Total loop delay, driver input (TXD) to receiver output (RXD), dominant to recessive | See Figure 7-4 , normal mode, VCC = VIO = 3 V to 3.6 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF TCAN3404, TCAN3403 |
120 | 180 | ns | |
| See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF TCAN3403 |
125 | 190 | ns | |||
| See Figure 7-4 , normal mode, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF TCAN3403 |
140 | 210 | ns | |||
| tMODE | Mode change time, from normal to standby or from standby to normal | See Figure8-5 in TCAN1044A datasheet See Figure 7-5 |
30 | μs | ||
| tSHDN1 | Mode change time from normal mode to shutdown mode | With TXD = High, Time from SHDN pin (low to high edge 50%) to CANH going from recessive level Vo(rec) to 0.5V | 40 | μs | ||
| tSHDN2 | Mode change time from shutdown mode to normal mode | With TXD high, time from SHDN pin (high to low edge 50%) to CANH going from 0.5V to Vo(rec) | 200 | μs | ||
| tWK_FILTER | Filter time for a valid wake-up pattern | See Figure 8-5 | 0.5 | 1.8 | μs | |
| tWK_TIMEOUT | Bus wake-up timeout value | 0.8 | 6 | ms | ||
| Tstartup | Time duration after VCC or VIO hass cleared UV+, and device can resume normal operation | 1.5 | ms | |||
| Tfilter(STB) | Filter on STB pin to filter out any glitches | 0.5 | 1 | 2 | μs | |
| Tfilter(SHDN) | Filter on SHDN pin to filter out any glitches | 0.5 | 1 | 2 | μs | |
| Driver Switching Characteristics | ||||||
| tprop(TxD-busrec) | Propagation delay time, low-to-high TXD edge to driver recessive (dominant to recessive) | See Figure 7-2 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, VCC = VIO = 3 V to 3.6 V TCAN3404, TCAN3403 |
65 | 100 | ns | |
| See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V TCAN3403 |
67 | 110 | ns | |||
| See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V TCAN3403 |
71 | 110 | ns | |||
| tprop(TxD-busdom) | Propagation delay time, high-to-low TXD edge to driver dominant (recessive to dominant) | See Figure 7-2 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, VCC = VIO = 3 V to 3.6 V TCAN3404, TCAN3403 |
46 | 100 | ns | |
| See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V TCAN3403 |
48 | 110 | ns | |||
| See Figure 7-2 ,STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V TCAN3403 |
53 | 110 | ns | |||
| tsk(p) | Pulse skew (|tprop(TxD-busrec) - tprop(TxD-busdom)|) | , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, See Figure 7-2 | 18 | 28 | ns | |
| tR | Differential output signal rise time | See Figure 7-2 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF | 32 | 57 | ns | |
| tF | Differential output signal fall time | 30 | 50 | ns | ||
| tTXD_DTO | Dominant timeout | See Figure 7-6 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF | 1.2 | 4.0 | ms | |
| Receiver Switching Characteristics | ||||||
| tprop(busrec-RXD) | Propagation delay time, bus recessive input to RXD high output (dominant to recessive) | See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = VIO = 3 V to 3.6 V TCAN3404, TCAN3403 |
55 | 90 | ns | |
| See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V TCAN3403 |
60 | 90 | ns | |||
| See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V TCAN3403 |
70 | 102 | ns | |||
| tprop(busdom-RXD) | Propagation delay time, bus dominant input to RXD low output (recessive to dominant) | See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = VIO = 3 V to 3.6 V TCAN3404, TCAN3403 |
45 | 90 | ns | |
| See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 2.25 V to 2.75 V TCAN3403 |
51 | 90 | ns | |||
| See Figure 7-3 , STB, SHDN = 0 V, CL(RXD) = 15 pF, VCC = 3 to 3.6 V, VIO = 1.71 V to 1.89 V TCAN3403 |
60 | 100 | ns | |||
| tR | RXD output signal rise time | See Figure 7-3 , STB, SHDN = 0 V CL(RXD) = 15 pF |
10 | 25 | ns | |
| tF | RXD output signal fall time | 10 | 28 | ns | ||
| FD Timing Characteristics | ||||||
| tBIT(BUS) | Bit time on CAN bus output pins with tBIT(TXD) = 500 ns | See Figure 7-4 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF | 450 | 525 | ns | |
| Bit time on CAN bus output pins with tBIT(TXD) = 200 ns | 160 | 205 | ns | |||
| Bit time on CAN bus output pins with tBIT(TXD) = 125 ns(1) | 85 | 130 | ns | |||
| tBIT(RXD) | Bit time on RXD output pins with tBIT(TXD) = 500 ns | See Figure 7-4 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF | 410 | 540 | ns | |
| Bit time on RXD output pins with tBIT(TXD) = 200 ns | 130 | 210 | ns | |||
| Bit time on RXD output pins with tBIT(TXD) = 125 ns(1) | 75 | 135 | ns | |||
| ΔtREC | Receiver timing symmetry with tBIT(TXD) = 500 ns | See Figure 7-4 , STB, SHDN = 0 V, RL = 60 ?, CL = 100 pF, CL(RXD) = 15 pF ΔtREC = tBIT(RXD) - tBIT(BUS) |
-50 | 20 | ns | |
| Receiver timing symmetry with tBIT(TXD) = 200 ns | -40 | 10 | ns | |||
| Receiver timing symmetry with tBIT(TXD) = 125 ns(1) | -40 | 10 | ns | |||