ZHCSJ95Q July 2001 – January 2019 SN74LVC2G53
PRODUCTION DATA.
請(qǐng)參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
NOTE:
For simplicity, the test conditions shown in Figure 1 through Figure 4 and Figure 6 through Figure 10 are for the demultiplexer configuration. Signals can be passed from COM to Y1 (Y2) or from Y1 (Y2) to COM.
Figure 12. Logic Diagram, Each Switch (SW)