ZHCSSI0K April 1999 – September 2024 SN74LV4040A
PRODMIX
請參考 PDF 數(shù)據(jù)表獲取器件具體的封裝圖。
Figure 3-1 SN74LV4040A D, DB, DGV, N,
NS, or PW Package (Top View)
| PIN | TYPE(1) | DESCRIPTION | |
|---|---|---|---|
| NAME | NO. | ||
| QL | 1 | O | QL output |
| QF | 2 | O | QF output |
| QE | 3 | O | QE output |
| QG | 4 | O | QG output |
| QD | 5 | O | QD output |
| QC | 6 | O | QC output |
| QB | 7 | O | QB output |
| GND | 8 | - | Ground |
| QA | 9 | O | QA output |
| CLK | 10 | I | Clock, falling edge triggered |
| CLR | 11 | I | Clear, active high |
| QI | 12 | O | QI output |
| QH | 13 | O | QH output |
| QJ | 14 | O | QJ output |
| QK | 15 | O | QK output |
| VCC | 16 | - | Positive supply |